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Message-ID: <d260937a-63bd-e3af-a032-c0b8848a4025@omp.ru>
Date:   Wed, 4 May 2022 22:54:30 +0300
From:   Sergey Shtylyov <s.shtylyov@....ru>
To:     Phil Edworthy <phil.edworthy@...esas.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Geert Uytterhoeven <geert+renesas@...der.be>
CC:     Biju Das <biju.das.jz@...renesas.com>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
        <netdev@...r.kernel.org>, <linux-renesas-soc@...r.kernel.org>
Subject: Re: [PATCH 4/9] ravb: Separate handling of irq enable/disable regs
 into feature

On 5/4/22 5:54 PM, Phil Edworthy wrote:

> Currently, when the HW has a single interrupt, the driver uses the
> TIC, RIC0 registers to enable and disable RX/TX interrupts. When
> the HW has multiple interrupts, it uses the TIE, TID, RIE0, RID0
> registers.
> 
> However, other devices, e.g. RZ/V2M, have multiple irqs and use
> the TIC, RIC0 registers.

   s/use/have only/?

> Therefore, split this into a separate feature.
> 
> Signed-off-by: Phil Edworthy <phil.edworthy@...esas.com>
> Reviewed-by: Biju Das <biju.das.jz@...renesas.com>
> ---
>  drivers/net/ethernet/renesas/ravb.h      | 1 +
>  drivers/net/ethernet/renesas/ravb_main.c | 5 +++--
>  2 files changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h
> index 15aa09d93ff0..67a240665cd2 100644
> --- a/drivers/net/ethernet/renesas/ravb.h
> +++ b/drivers/net/ethernet/renesas/ravb.h
> @@ -1027,6 +1027,7 @@ struct ravb_hw_info {
>  	unsigned tx_counters:1;		/* E-MAC has TX counters */
>  	unsigned carrier_counters:1;	/* E-MAC has carrier counters */
>  	unsigned multi_irqs:1;		/* AVB-DMAC and E-MAC has multiple irqs */
> +	unsigned irq_en_dis_regs:1;	/* Has separate irq enable and disable regs */

   Perhaps just irq_en_dis?

>  	unsigned gptp:1;		/* AVB-DMAC has gPTP support */
>  	unsigned ccc_gac:1;		/* AVB-DMAC has gPTP support active in config mode */
>  	unsigned gptp_ptm_gic:1;	/* gPTP enables Presentation Time Match irq via GIC */
[...]

MBR, Sergey

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