netdev - Re: [PATCH 3/9] ravb: Separate use of GIC reg for PTME from multi

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Date:   Wed, 4 May 2022 23:40:26 +0300
From:   Sergey Shtylyov <s.shtylyov@....ru>
To:     Phil Edworthy <phil.edworthy@...esas.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Geert Uytterhoeven <geert+renesas@...der.be>
CC:     Biju Das <biju.das.jz@...renesas.com>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
        <netdev@...r.kernel.org>, <linux-renesas-soc@...r.kernel.org>
Subject: Re: [PATCH 3/9] ravb: Separate use of GIC reg for PTME from
 multi_irqs

On 5/4/22 5:54 PM, Phil Edworthy wrote:

> When the HW has a single interrupt, the driver currently uses the
> PTME (Presentation Time Match Enable) bit in the GIC register to
> enable/disable the PTM irq. Otherwise, it uses the GIE/GID registers.
> 
> However, other SoCs, e.g. RZ/V2M, have multiple irqs and use the GIC
> register PTME bit, so separate it out as it's own feature.
> 
> Signed-off-by: Phil Edworthy <phil.edworthy@...esas.com>
> Reviewed-by: Biju Das <biju.das.jz@...renesas.com>
> ---
>  drivers/net/ethernet/renesas/ravb.h      | 1 +
>  drivers/net/ethernet/renesas/ravb_main.c | 1 +
>  drivers/net/ethernet/renesas/ravb_ptp.c  | 4 ++--
>  3 files changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h
> index 08062d73df10..15aa09d93ff0 100644
> --- a/drivers/net/ethernet/renesas/ravb.h
> +++ b/drivers/net/ethernet/renesas/ravb.h
> @@ -1029,6 +1029,7 @@ struct ravb_hw_info {
>  	unsigned multi_irqs:1;		/* AVB-DMAC and E-MAC has multiple irqs */
>  	unsigned gptp:1;		/* AVB-DMAC has gPTP support */
>  	unsigned ccc_gac:1;		/* AVB-DMAC has gPTP support active in config mode */
> +	unsigned gptp_ptm_gic:1;	/* gPTP enables Presentation Time Match irq via GIC */

   I think this needs to be controlled by the 'irq_en_dis' feature bit from the patch #4.

[...]

MBR, Sergey