netdev - Re: [PATCH net-next 07/10] net: ethernet: freescale: xgmac: Separate C22 and C45 transactions for xgmac

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Date:   Tue, 10 May 2022 21:01:58 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Vladimir Oltean <olteanv@...il.com>
Cc:     netdev <netdev@...r.kernel.org>,
        Sean Wang <sean.wang@...iatek.com>,
        Landen Chao <Landen.Chao@...iatek.com>,
        DENG Qingfang <dqfext@...il.com>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Joakim Zhang <qiangqing.zhang@....com>,
        Sergey Shtylyov <s.shtylyov@....ru>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>,
        Tobias Waldekranz <tobias@...dekranz.com>,
        Marcin Wojtas <mw@...ihalf.com>,
        Calvin Johnson <calvin.johnson@....nxp.com>,
        Markus Koch <markus@...syncing.net>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Yang Yingliang <yangyingliang@...wei.com>,
        Hao Chen <chenhao288@...ilicon.com>
Subject: Re: [PATCH net-next 07/10] net: ethernet: freescale: xgmac: Separate
 C22 and C45 transactions for xgmac

On Tue, May 10, 2022 at 09:28:18PM +0300, Vladimir Oltean wrote:
> On Sun, May 08, 2022 at 05:30:46PM +0200, Andrew Lunn wrote:
> > The xgmac MDIO bus driver can perform both C22 and C45 transfers.
> > Create separate functions for each and register the C45 versions using
> > the new API calls where appropriate.
> > 
> > Signed-off-by: Andrew Lunn <andrew@...n.ch>
> > ---
> >  drivers/net/ethernet/freescale/xgmac_mdio.c | 154 +++++++++++++++-----
> >  1 file changed, 117 insertions(+), 37 deletions(-)
> > 
> > diff --git a/drivers/net/ethernet/freescale/xgmac_mdio.c b/drivers/net/ethernet/freescale/xgmac_mdio.c
> > index ec90da1de030..ddfe6bf1f231 100644
> > --- a/drivers/net/ethernet/freescale/xgmac_mdio.c
> > +++ b/drivers/net/ethernet/freescale/xgmac_mdio.c
> > @@ -128,30 +128,59 @@ static int xgmac_wait_until_done(struct device *dev,
> >  	return 0;
> >  }
> >  
> > -/*
> > - * Write value to the PHY for this device to the register at regnum,waiting
> > +/* Write value to the PHY for this device to the register at regnum,waiting
> >   * until the write is done before it returns.  All PHY configuration has to be
> >   * done through the TSEC1 MIIM regs.
> >   */
> > -static int xgmac_mdio_write(struct mii_bus *bus, int phy_id, int regnum, u16 value)
> > +static int xgmac_mdio_write_c22(struct mii_bus *bus, int phy_id, int regnum,
> > +				u16 value)
> >  {
> >  	struct mdio_fsl_priv *priv = (struct mdio_fsl_priv *)bus->priv;
> >  	struct tgec_mdio_controller __iomem *regs = priv->mdio_base;
> > -	uint16_t dev_addr;
> > +	bool endian = priv->is_little_endian;
> >  	u32 mdio_ctl, mdio_stat;
> > +	u16 dev_addr;
> >  	int ret;
> > +
> > +	mdio_stat = xgmac_read32(&regs->mdio_stat, endian);
> > +	dev_addr = regnum & 0x1f;
> 
> Please move this either to the variable declaration, or near the mdio_ctl write,
> or just integrate it into the macro argument.

There are masks like this in some drivers, others don't. Since for the
majority of the MDIO bus drivers i don't have the hardware i was
trying to keep my changes to a minimum, so i'm less likely to break
it.

Once we have all the bus drivers converted, we can validate all the
requests in the core to guarantee no users are passing invalid values
to the drivers. And then all these masks can be removed.

> 
> > +	mdio_stat &= ~MDIO_STAT_ENC;
> > +
> 
> You can remove this empty line during read-modify-write patterns.

Sure, but just an FYI: the old code probably did it that way. My aim
is to split C22 from C45, not re-write/clean up every driver. I have
over 40 patches in total, without doing cleanups.

   Andrew