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Date:   Thu, 12 May 2022 12:47:17 +0100
From:   Phil Edworthy <>
To:     Michael Turquette <>,
        Stephen Boyd <>,
        Rob Herring <>,
        Krzysztof Kozlowski <>,
        "David S. Miller" <>,
        Eric Dumazet <>,
        Jakub Kicinski <>,
        Paolo Abeni <>
Cc:     Phil Edworthy <>,
        Geert Uytterhoeven <>,
        Sergey Shtylyov <>,
        Sergei Shtylyov <>,
        Biju Das <>,
        Lad Prabhakar <>,
        Chris Paterson <>,
        Magnus Damm <>,,,,
Subject: [PATCH v4 0/5] Add Renesas RZ/V2M Ethernet support

The RZ/V2M Ethernet is very similar to R-Car Gen3 Ethernet-AVB, though
some small parts are the same as R-Car Gen2.
Other differences are:
* It has separate data (DI), error (Line 1) and management (Line 2) irqs
  rather than one irq for all three.
* Instead of using the High-speed peripheral bus clock for gPTP, it has
  a separate gPTP reference clock.

 * Add clk_disable_unprepare() for gptp ref clk

 * Really renamed irq_en_dis_regs to irq_en_dis this time
 * Modified ravb_ptp_extts() to use irq_en_dis
 * Added Reviewed-by tags

 * Just net patches in this series
 * Instead of reusing ch22 and ch24 interrupt names, use the proper names
 * Renamed irq_en_dis_regs to irq_en_dis
 * Squashed use of GIC reg versus GIE/GID and got rid of separate gptp_ptm_gic feature.
 * Move err_mgmt_irqs code under multi_irqs
 * Minor editing of the commit msgs

Phil Edworthy (5):
  dt-bindings: net: renesas,etheravb: Document RZ/V2M SoC
  ravb: Separate handling of irq enable/disable regs into feature
  ravb: Support separate Line0 (Desc), Line1 (Err) and Line2 (Mgmt) irqs
  ravb: Use separate clock for gPTP
  ravb: Add support for RZ/V2M

 .../bindings/net/renesas,etheravb.yaml        |  82 +++++++++----
 drivers/net/ethernet/renesas/ravb.h           |   6 +
 drivers/net/ethernet/renesas/ravb_main.c      | 109 ++++++++++++++++--
 drivers/net/ethernet/renesas/ravb_ptp.c       |   6 +-
 4 files changed, 168 insertions(+), 35 deletions(-)


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