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Date:   Tue, 19 Jul 2022 07:40:16 +0000
From:   Ferenc Fejes <ferenc.fejes@...csson.com>
To:     "vinicius.gomes@...el.com" <vinicius.gomes@...el.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>
CC:     "marton12050@...il.com" <marton12050@...il.com>,
        "peti.antal99@...il.com" <peti.antal99@...il.com>
Subject: Re: igc: missing HW timestamps at TX

Hi Vinicius!

On Mon, 2022-07-18 at 11:46 -0300, Vinicius Costa Gomes wrote:
> Hi Ferenc,
> 
> Ferenc Fejes <ferenc.fejes@...csson.com> writes:
> 
> > (Ctrl+Enter'd by mistake)
> > 
> > My question here: is there anything I can quickly try to avoid that
> > behavior? Even when I send only a few (like 10) packets but on fast
> > rate (5us between packets) I get missing TX HW timestamps. The
> > receive
> > side looks much more roboust, I cannot noticed missing HW
> > timestamps
> > there.
> 
> There's a limitation in the i225/i226 in the number of "in flight" TX
> timestamps they are able to handle. The hardware has 4 sets of
> registers
> to handle timestamps.
> 
> There's an aditional issue that the driver as it is right now, only
> uses
> one set of those registers.
> 
> I have one only briefly tested series that enables the driver to use
> the
> full set of TX timestamp registers. Another reason that it was not
> proposed yet is that I still have to benchmark it and see what is the
> performance impact.

Thank you for the quick reply! I'm glad you already have this series
right off the bat. I'll be back when we done with a quick testing,
hopefully sooner than later.
> 
> If you are feeling adventurous and feel like helping test it, here is
> the link:
> 
> https%3A%2F%2Fgithub.com%2Fvcgomes%2Fnet-next%2Ftree%2Figc-multiple-tstamp-timers-lock-new
> 
> 
> Cheers,

Best,
Ferenc

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