[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date: Mon, 08 Aug 2022 07:31:20 +0200
From: Kurt Kanzenbach <kurt@...utronix.de>
To: Vladimir Oltean <vladimir.oltean@....com>, netdev@...r.kernel.org
Cc: devicetree@...r.kernel.org,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>, Andrew Lunn <andrew@...n.ch>,
Vivien Didelot <vivien.didelot@...il.com>,
Florian Fainelli <f.fainelli@...il.com>,
Vladimir Oltean <olteanv@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Oleksij Rempel <linux@...pel-privat.de>,
Christian Marangi <ansuelsmth@...il.com>,
John Crispin <john@...ozen.org>,
Mans Rullgard <mans@...sr.com>,
Arun Ramadoss <arun.ramadoss@...rochip.com>,
Woojung Huh <woojung.huh@...rochip.com>,
UNGLinuxDriver@...rochip.com,
Claudiu Manoil <claudiu.manoil@....com>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
George McCollister <george.mccollister@...il.com>,
DENG Qingfang <dqfext@...il.com>,
Sean Wang <sean.wang@...iatek.com>,
Landen Chao <Landen.Chao@...iatek.com>,
Matthias Brugger <matthias.bgg@...il.com>,
Hauke Mehrtens <hauke@...ke-m.de>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Aleksander Jan Bajkowski <olek2@...pl>,
Alvin Šipraga <alsi@...g-olufsen.dk>,
Luiz Angelo Daros de Luca <luizluca@...il.com>,
Linus Walleij <linus.walleij@...aro.org>,
Pawel Dembicki <paweldembicki@...il.com>,
Clément Léger <clement.leger@...tlin.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Russell King <rmk+kernel@...linux.org.uk>,
Marek Behún <kabel@...nel.org>,
Marcin Wojtas <mw@...ihalf.com>, Marek Vasut <marex@...x.de>,
linux-renesas-soc@...r.kernel.org
Subject: Re: [RFC PATCH v3 net-next 02/10] dt-bindings: net: dsa: hellcreek:
add missing CPU port phy-mode/fixed-link to example
On Sat Aug 06 2022, Vladimir Oltean wrote:
> Looking at hellcreek_phylink_get_caps(), I see that depending on whether
> is_100_mbits is set, speeds of 1G or of 100M will be advertised. The
> de1soc_r1_pdata sets is_100_mbits to true.
>
> The PHY modes declared in the capabilities are MII, RGMII and GMII. GMII
> doesn't support 100Mbps, and as for RGMII, it would be a bit implausible
> to me to support this PHY mode but limit it to only 25 MHz. So I've
> settled on MII as a phy-mode in the example, and a fixed-link of
> 100Mbps.
>
> As a side note, there exists such a thing as "rev-mii", because the MII
> protocol is asymmetric, and "mii" is the designation for the MAC side
> (expected to be connected to a PHY), and "rev-mii" is the designation
> for the PHY side (expected to be connected to a MAC). I wonder whether
> "mii" or "rev-mii" should actually be used here, since this is a CPU
> port and presumably connected to another MAC.
>
> Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>
Reviewed-by: Kurt Kanzenbach <kurt@...utronix.de>
Download attachment "signature.asc" of type "application/pgp-signature" (862 bytes)
Powered by blists - more mailing lists