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Date: Mon, 8 Aug 2022 10:31:10 +0300
From: Vladimir Oltean <olteanv@...il.com>
To: Christian Marangi <ansuelsmth@...il.com>
Cc: Vladimir Oltean <vladimir.oltean@....com>, netdev@...r.kernel.org,
devicetree@...r.kernel.org,
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Frank Rowand <frowand.list@...il.com>
Subject: Re: [RFC PATCH v3 net-next 10/10] net: dsa: make phylink-related OF
properties mandatory on DSA and CPU ports
On Sat, Aug 06, 2022 at 09:58:16PM +0200, Christian Marangi wrote:
> > qca8k
> > ~~~~~
> >
> > compatible strings:
> > - qca,qca8327
> > - qca,qca8328
> > - qca,qca8334
> > - qca,qca8337
> >
> > 5 occurrences in mainline device trees, none of the descriptions are
> > problematic.
> >
> > Verdict: opt into validation.
>
> I notice some have strict validation and other simple validation. I
> didn't understand from the commit description where strict is used
> instead of simple one.
There is no difference between "opt into validation" and "opt into
strict validation" in the verdicts for each driver. It all means the
same thing, which is that we won't apply DSA's workaround to skip
phylink registration for them (and implicitly fail the probing, if they
have lacking device trees, but the assumption is that they don't).
I suppose I could improve the wording.
> I'm asking this for qca8k as from what we notice with device that use
> qca8k the master ports always needs to have info in dt as we reset the
> switch and always need to correctly setup the port.
How sure are you about this? I am noticing the following commits:
79a4ed4f0f93 ("net: dsa: qca8k: Force CPU port to its highest bandwidth")
9bb2289f90e6 ("net: dsa: qca8k: Allow overwriting CPU port setting")
which suggests at at least at some point, the qca8k driver didn't rely
on device tree information for the CPU port. Now if that information was
available in the device tree in the first place, I don't know.
The phy-mode seems to have been; I'm looking at the initial commit
6b93fb46480a ("net-next: dsa: add new driver for qca8xxx family") and
there is an of_get_phy_mode() with a hard error on missing property for
the CPU port.
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