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Message-ID: <CO1PR11MB4771E1680E841F91411AE6DFE2759@CO1PR11MB4771.namprd11.prod.outlook.com>
Date: Fri, 26 Aug 2022 03:50:44 +0000
From: <Divya.Koppera@...rochip.com>
To: <andrew@...n.ch>
CC: <hkallweit1@...il.com>, <linux@...linux.org.uk>,
<davem@...emloft.net>, <edumazet@...gle.com>, <kuba@...nel.org>,
<pabeni@...hat.com>, <netdev@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <UNGLinuxDriver@...rochip.com>
Subject: RE: [PATCH net-next] net: phy: micrel: Adding SQI support for lan8814
phy
Hi,
> -----Original Message-----
> From: Andrew Lunn <andrew@...n.ch>
> Sent: Friday, August 26, 2022 3:24 AM
> To: Divya Koppera - I30481 <Divya.Koppera@...rochip.com>
> Cc: hkallweit1@...il.com; linux@...linux.org.uk; davem@...emloft.net;
> edumazet@...gle.com; kuba@...nel.org; pabeni@...hat.com;
> netdev@...r.kernel.org; linux-kernel@...r.kernel.org; UNGLinuxDriver
> <UNGLinuxDriver@...rochip.com>
> Subject: Re: [PATCH net-next] net: phy: micrel: Adding SQI support for
> lan8814 phy
>
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> > +#define LAN8814_DCQ_CTRL 0xe6
> > +#define LAN8814_DCQ_CTRL_READ_CAPTURE_ BIT(15)
> > +#define LAN8814_DCQ_CTRL_CHANNEL_MASK GENMASK(1,
> 0)
> > +#define LAN8814_DCQ_SQI 0xe4
> > +#define LAN8814_DCQ_SQI_MAX 7
> > +#define LAN8814_DCQ_SQI_VAL_MASK GENMASK(3, 1)
> > +
> > static int lanphy_read_page_reg(struct phy_device *phydev, int page,
> > u32 addr) {
> > int data;
> > @@ -2927,6 +2934,32 @@ static int lan8814_probe(struct phy_device
> *phydev)
> > return 0;
> > }
> >
> > +static int lan8814_get_sqi(struct phy_device *phydev) {
> > + int rc, val;
> > +
> > + val = lanphy_read_page_reg(phydev, 1, LAN8814_DCQ_CTRL);
> > + if (val < 0)
> > + return val;
>
> I just took a quick look at the datasheet. It says:
>
I'm not sure the datasheet you looked into is the right one. Could you please crosscheck if its lan8814 or lan8841.
Lan8814 is quad port phy where register access are of extended page. Lan8841 is 1 port phy where register access are mmd access.
> All registers references in this section are in MMD Device Address 1
>
> So you should be using phy_read_mmd(phydev, MDIO_MMD_PMAPMD,
> xxx) to read/write these registers. The datasheet i have however is missing
> the register map, so i've no idea if it is still 0xe6.
>
I hope above explanation gives answer.
> Andrew
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