netdev - Re: [PATCH v3 2/3] net: ethernet: renesas: Add Ethernet Switch driver

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <YzWzDEqCFYqqJcr0@lunn.ch>
Date:   Thu, 29 Sep 2022 17:00:28 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
Cc:     "davem@...emloft.net" <davem@...emloft.net>,
        "edumazet@...gle.com" <edumazet@...gle.com>,
        "kuba@...nel.org" <kuba@...nel.org>,
        "pabeni@...hat.com" <pabeni@...hat.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-renesas-soc@...r.kernel.org" 
        <linux-renesas-soc@...r.kernel.org>
Subject: Re: [PATCH v3 2/3] net: ethernet: renesas: Add Ethernet Switch driver

On Thu, Sep 29, 2022 at 12:22:15PM +0000, Yoshihiro Shimoda wrote:
> Hi Andrew,
> 
> > From: Andrew Lunn, Sent: Wednesday, September 28, 2022 9:01 PM
> > 
> > > > How do you direct a frame from the
> > > > CPU out a specific user port? Via the DMA ring you place it into, or
> > > > do you need a tag on the frame to indicate its egress port?
> > >
> > > Via the DMA ring.
> > 
> > Are there bits in the ring descriptor which indicate the user port?
> > Can you set these bits to some other value which causes the switch to
> > use its MAC table to determine the egress interface?
> 
> I'm sorry, I misunderstood the hardware behaviors.
> 
> 1) From CPU to user port: CPU sends a frame to all user ports.
> 2) From user port to CPU: each user port sends a frame to each DMA ring.
> 
> About the 1) above, the switch can have MAC tables and sends a frame to
> a specific user port. However, the driver doesn't support it.

In order to make STP and PTP work, you need to be able to send a frame
out a specific port. With STP, that port can also be blocked,
i.e. normal frames are not allowed to be transmitted/received, but
these STP frames are allowed. You also need to know what port an STP
frame was received on.

So the switch probably has a mechanism to send a frame from the CPU
out one specific port. And frames received from a user port and passed
to the CPU should also be identifiable. There are different ways of
doing this. DSA typically has an extra header on the frame, indicating
where it is from/to. Some switches have extra bits in the DMA buffer
descriptor indicating the port.

> However, if I dropped specific registers setting, it doesn't work correctly.
> I'll investigate why removing speeds of PHY didn't work.

It could be the PHY is using SGMII, but your MAC needs 1000BaseX?

   Andrew