netdev - RE: [PATCH v3 2/3] net: ethernet: renesas: Add Ethernet Switch driver

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Date:   Fri, 30 Sep 2022 13:45:52 +0000
From:   Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
To:     Andrew Lunn <andrew@...n.ch>
CC:     "davem@...emloft.net" <davem@...emloft.net>,
        "edumazet@...gle.com" <edumazet@...gle.com>,
        "kuba@...nel.org" <kuba@...nel.org>,
        "pabeni@...hat.com" <pabeni@...hat.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-renesas-soc@...r.kernel.org" 
        <linux-renesas-soc@...r.kernel.org>
Subject: RE: [PATCH v3 2/3] net: ethernet: renesas: Add Ethernet Switch driver

Hi Andrew,

> From: Andrew Lunn, Sent: Friday, September 30, 2022 12:00 AM
> 
> On Thu, Sep 29, 2022 at 12:22:15PM +0000, Yoshihiro Shimoda wrote:
> > Hi Andrew,
> >
> > > From: Andrew Lunn, Sent: Wednesday, September 28, 2022 9:01 PM
> > >
> > > > > How do you direct a frame from the
> > > > > CPU out a specific user port? Via the DMA ring you place it into, or
> > > > > do you need a tag on the frame to indicate its egress port?
> > > >
> > > > Via the DMA ring.
> > >
> > > Are there bits in the ring descriptor which indicate the user port?
> > > Can you set these bits to some other value which causes the switch to
> > > use its MAC table to determine the egress interface?
> >
> > I'm sorry, I misunderstood the hardware behaviors.
> >
> > 1) From CPU to user port: CPU sends a frame to all user ports.
> > 2) From user port to CPU: each user port sends a frame to each DMA ring.
> >
> > About the 1) above, the switch can have MAC tables and sends a frame to
> > a specific user port. However, the driver doesn't support it.
> 
> In order to make STP and PTP work, you need to be able to send a frame
> out a specific port. With STP, that port can also be blocked,
> i.e. normal frames are not allowed to be transmitted/received, but
> these STP frames are allowed. You also need to know what port an STP
> frame was received on.

I understood it.

> So the switch probably has a mechanism to send a frame from the CPU
> out one specific port. And frames received from a user port and passed
> to the CPU should also be identifiable. There are different ways of
> doing this. DSA typically has an extra header on the frame, indicating
> where it is from/to. Some switches have extra bits in the DMA buffer
> descriptor indicating the port.

I'll looking for such a feature in the switch.

> > However, if I dropped specific registers setting, it doesn't work correctly.
> > I'll investigate why removing speeds of PHY didn't work.
> 
> It could be the PHY is using SGMII, but your MAC needs 1000BaseX?

Both the PHY and MAC is using SGMII. For now, I didn't find why.
So, I'll continue to investigate this issue too.

Best regards,
Yoshihiro Shimoda

>    Andrew