netdev - RE: [PATCH RFC 2/3] net: phy: marvell10g: Add host interface speed configuration

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Message-ID: <TYBPR01MB534181BF14DFF7485C500C61D82A9@TYBPR01MB5341.jpnprd01.prod.outlook.com>
Date:   Thu, 20 Oct 2022 01:15:53 +0000
From:   Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
To:     Marek Behún <kabel@...nel.org>
CC:     "linux@...linux.org.uk" <linux@...linux.org.uk>,
        "andrew@...n.ch" <andrew@...n.ch>,
        "hkallweit1@...il.com" <hkallweit1@...il.com>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "edumazet@...gle.com" <edumazet@...gle.com>,
        "kuba@...nel.org" <kuba@...nel.org>,
        "pabeni@...hat.com" <pabeni@...hat.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-renesas-soc@...r.kernel.org" 
        <linux-renesas-soc@...r.kernel.org>
Subject: RE: [PATCH RFC 2/3] net: phy: marvell10g: Add host interface speed
 configuration

Hi Marek,

> From: Marek Behún, Sent: Wednesday, October 19, 2022 7:49 PM
> 
> On Wed, 19 Oct 2022 17:50:51 +0900
> Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com> wrote:
> 
> > Add support for selecting host speed mode. For now, only support
> > 1000M bps.
> >
> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
> > ---
> >  drivers/net/phy/marvell10g.c | 23 +++++++++++++++++++++++
> >  1 file changed, 23 insertions(+)
> >
> > diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
> > index 383a9c9f36e5..daf3242c6078 100644
> > --- a/drivers/net/phy/marvell10g.c
> > +++ b/drivers/net/phy/marvell10g.c
> > @@ -101,6 +101,10 @@ enum {
> >  	MV_AN_21X0_SERDES_CTRL2_AUTO_INIT_DIS	= BIT(13),
> >  	MV_AN_21X0_SERDES_CTRL2_RUN_INIT	= BIT(15),
> >
> > +	MV_MOD_CONF		= 0xf000,
> > +	MV_MOD_CONF_SPEED_MASK	= 0x00c0,
> > +	MV_MOD_CONF_SPEED_1000	= BIT(7),
> > +
> 
> Where did you get these values from? My documentation says:
>   Mode Configuration
>   Device 31, Register 0xF000
>   Bits
>   7:6   Reserved  R/W  0x3  This must always be 11.

Hmm, that's true. The register description said that.
But, "loopback control" in the functional description said
"default MAC interface Speed". (I don't use loopback mode though...)

> >  	/* These registers appear at 0x800X and 0xa00X - the 0xa00X control
> >  	 * registers appear to set themselves to the 0x800X when AN is
> >  	 * restarted, but status registers appear readable from either.
> > @@ -147,6 +151,7 @@ struct mv3310_chip {
> >  	int (*get_mactype)(struct phy_device *phydev);
> >  	int (*set_mactype)(struct phy_device *phydev, int mactype);
> >  	int (*select_mactype)(unsigned long *interfaces);
> > +	int (*set_macspeed)(struct phy_device *phydev, int macspeed);
> >  	int (*init_interface)(struct phy_device *phydev, int mactype);
> >
> >  #ifdef CONFIG_HWMON
> > @@ -644,6 +649,16 @@ static int mv2110_select_mactype(unsigned long *interfaces)
> >  		return -1;
> >  }
> >
> > +static int mv2110_set_macspeed(struct phy_device *phydev, int macspeed)
> > +{
> > +	if (macspeed != SPEED_1000)
> > +		return -EOPNOTSUPP;
> > +
> > +	return phy_modify_mmd(phydev, MDIO_MMD_VEND2, MV_MOD_CONF,
> > +			      MV_MOD_CONF_SPEED_MASK,
> > +			      MV_MOD_CONF_SPEED_1000);
> > +}
> 
> Why not also support other speeds, if we are doing this already?

The register seems to support other speeds: 10, 100 Mbps and "speed controlled by
other register". I'll update this function if acceptable...
# I'm thinking this is not acceptable because the register description said "Reserved"
# as you mentioned.

Best regards,
Yoshihiro Shimoda