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Date:   Fri, 28 Oct 2022 13:58:57 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Fabio Estevam <festevam@...il.com>
Cc:     Vladimir Oltean <vladimir.oltean@....com>,
        "tharvey@...eworks.com" <tharvey@...eworks.com>,
        netdev <netdev@...r.kernel.org>, Marek Vasut <marex@...x.de>,
        Fabio Estevam <festevam@...x.de>
Subject: Re: Marvell 88E6320 connected to i.MX8MN

On Thu, Oct 27, 2022 at 11:24:40PM -0300, Fabio Estevam wrote:
>  Hi Vladimir,
> 
> On Thu, Oct 27, 2022 at 5:41 PM Vladimir Oltean <vladimir.oltean@....com> wrote:
> 
> > Looks like you are missing the Marvell PHY driver; the generic PHY
> > driver gets used. Can you enable CONFIG_MARVELL_PHY?
> 
> CONFIG_MARVELL_PHY is already selected.
> 
> However, there is no support for 88E6320 in the Marvell PHY driver.

In theory, there should not be any support needed. The PHY registers 2
and 3 contain the PHY ID. If Marvell have reused an off the shelf PHY,
it should have an ID which the drivers knows.

However, a few Marvell Switches are broken by design, and registers 2
and 3 are empty. It is documented you should not use them to identify
the PHY. As usual for a datasheet, it gives no explanation why they
decided to break 802.3 Clause 22, but they have. So there is a
workaround for a couple of switches. See family_prod_id_table in
drivers/net/dsa/mv88e6xxx/chip.c

Under /sys/class/mdio_bus/ you should find all the PHYs and there is a
file phy_id. If it is 0, it has the above problem. Otherwise, you
might need to add the ID to drivers/net/phy/marvell.c.

You should be able to use mii-tool to dump the common PHY registers in
both your working and not working state and see if there is any
difference.

	Andrew

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