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Message-ID: <CAOMZO5BYN3ckaLguvK+Xj+dsTet4vSSwsDr6P8J_tG2_-VOniA@mail.gmail.com> Date: Fri, 28 Oct 2022 08:27:47 -0300 From: Fabio Estevam <festevam@...il.com> To: Andrew Lunn <andrew@...n.ch> Cc: Vladimir Oltean <vladimir.oltean@....com>, Tim Harvey <tharvey@...eworks.com>, netdev <netdev@...r.kernel.org>, Marek Vasut <marex@...x.de>, Fabio Estevam <festevam@...x.de> Subject: Re: Marvell 88E6320 connected to i.MX8MN Hi Andrew and Vladimir, On Thu, Oct 27, 2022 at 9:33 AM Andrew Lunn <andrew@...n.ch> wrote: > You have rgmii-id on both the FEC and the CPU port. So in theory you > might be getting double the needed delays? The mv88e6xxx driver will > apply these delays on the CPU port, but i don't know if the FEC does. > > The other thing i've done wrong in the past with FEC is get the pinmux > wrong, so the reference clock was not muxed. Check how the reference > clock should used, is it from the switch to the FEC, or the other way > around. If the FEC is providing it, is it ticking? Thanks for your suggestions. It is working now. mv88e6320_ops misses .port_set_rgmii_delay. I will submit a fix upstream soon. Thanks a lot! Fabio Estevam
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