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Date:   Fri, 28 Oct 2022 15:08:47 +0000
From:   Asmaa Mnebhi <asmaa@...dia.com>
To:     Andrew Lunn <andrew@...n.ch>,
        David Thompson <davthompson@...dia.com>
CC:     "davem@...emloft.net" <davem@...emloft.net>,
        "edumazet@...gle.com" <edumazet@...gle.com>,
        "kuba@...nel.org" <kuba@...nel.org>,
        "pabeni@...hat.com" <pabeni@...hat.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "cai.huoqing@...ux.dev" <cai.huoqing@...ux.dev>,
        "brgl@...ev.pl" <brgl@...ev.pl>, Liming Sun <limings@...dia.com>
Subject: RE: [PATCH net-next v1 3/4] mlxbf_gige: add BlueField-3 Serdes
 configuration

> +mlxbf_gige_clm_init[] = {
> +	{.addr = 0x001, .wdata = 0x0105},
> +	{.addr = 0x008, .wdata = 0x0001},
> +	{.addr = 0x00B, .wdata = 0x8420},
> +	{.addr = 0x00E, .wdata = 0x0110},
> +	{.addr = 0x010, .wdata = 0x3010},
> +	{.addr = 0x027, .wdata = 0x0104},
> +	{.addr = 0x02F, .wdata = 0x09EA},
> +	{.addr = 0x055, .wdata = 0x0008},
> +	{.addr = 0x058, .wdata = 0x0088},
> +	{.addr = 0x072, .wdata = 0x3222},
> +	{.addr = 0x073, .wdata = 0x7654},
> +	{.addr = 0x074, .wdata = 0xBA98},
> +	{.addr = 0x075, .wdata = 0xDDDC}
> +};
> +
> +#define MLXBF_GIGE_UPHY_CLM_INIT_NUM_ENTRIES \
> +	(sizeof(mlxbf_gige_clm_init) / sizeof(struct 
> +mlxbf_gige_uphy_cfg_reg))

ARRAY_SIZE() ?

You have a lot of completely undocumented black magic here. And these tables are quite large. I'm wondering if it really should be considered firmware, and loaded on demand from /lib/firmware ?

Hi Andrew,
We can add comments to document the "black magic" tables. The NVIDIA serdes has a lot of speed features and lane configurations. The lowest and simplest speed is 1G/1lane (the only one we support in this driver). there is an internal microcontroller which needs to be configured to implement all this. These tables were given to us as the hardware recipes to program serdes to operate in 1G/1 lane. We would prefer to keep all this code in one place i.e. as part of this driver.

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