lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 22 Nov 2022 07:05:22 +0000
From:   Bhadram Varka <vbhadram@...dia.com>
To:     Vladimir Oltean <olteanv@...il.com>
CC:     Florian Fainelli <f.fainelli@...il.com>,
        Thierry Reding <thierry.reding@...il.com>,
        "David S . Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Russell King <linux@...linux.org.uk>,
        Andrew Lunn <andrew@...n.ch>,
        Revanth Kumar Uppala <ruppala@...dia.com>,
        Jonathan Hunter <jonathanh@...dia.com>,
        "linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: RE: [PATCH net-next v4 RESEND] stmmac: tegra: Add MGBE support

Hi Vladimir,

> -----Original Message-----
> From: Vladimir Oltean <olteanv@...il.com>
> Sent: 18 November 2022 06:32 PM
> To: Bhadram Varka <vbhadram@...dia.com>
> Cc: Florian Fainelli <f.fainelli@...il.com>; Thierry Reding
> <thierry.reding@...il.com>; David S . Miller <davem@...emloft.net>; Eric
> Dumazet <edumazet@...gle.com>; Jakub Kicinski <kuba@...nel.org>;
> Paolo Abeni <pabeni@...hat.com>; Russell King <linux@...linux.org.uk>;
> Andrew Lunn <andrew@...n.ch>; Revanth Kumar Uppala
> <ruppala@...dia.com>; Jonathan Hunter <jonathanh@...dia.com>; linux-
> tegra@...r.kernel.org; netdev@...r.kernel.org
> Subject: Re: [PATCH net-next v4 RESEND] stmmac: tegra: Add MGBE support
> 
> External email: Use caution opening links or attachments
> 
> 
> Hi Bhadram,
> 
> On Wed, Oct 12, 2022 at 04:56:52AM +0000, Bhadram Varka wrote:
> > > You should be modeling this as a proper PCS driver and have a 'pcs-
> handle'
> > > property pointing to it in your Device Tree.
> > >
> > > The configuration you are doing here is probably working the first
> > > time you bring-up the network device but I doubt it works across
> > > system suspend/resume states where power to the GMAC and PCS is
> > > lost, it also begs the question of which mediums this was tested
> > > with and whether dynamic switching of speeds and so on is working?
> > > --
> >
> > For Tegra234, there is UPHY lanes control logic inside XPCS IP which is
> memory-mapped IP (not part of the MAC IP).
> > mgbe_uphy_lane_bringup performs UPHY lane bring up here. Here
> MGBE/XPCS works in XFI mode.
> >
> > Agree that lane bring down logic is not present interface down/suspend
> paths. Will update the changes accordingly.
> > One more thing is that UPHY lane bring should happen only after the line
> side link is up. This also will make the changes.
> > Please let me know if I miss anything here.
> 
> What about the non-UPHY part of the XPCS IP, how does the dwmac-tegra.c
> driver control it/see the status it reports?

Reset values of XPCS IP take care of configuring the IP in 10G mode. No need for extra register programming is required from the driver side. The only status that the driver expects from XPCS IP is RLU to be up which will be done by serdes_up in recent posted changes. Please let me know if any other queries on recent changes [0]

Thank You!

[0]: https://patchwork.ozlabs.org/project/linux-tegra/patch/20221118075744.49442-2-ruppala@nvidia.com/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ