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Message-ID: <166924092234.2582728.15149777135659209160.robh@kernel.org>
Date: Wed, 23 Nov 2022 16:02:03 -0600
From: Rob Herring <robh@...nel.org>
To: Miquel Raynal <miquel.raynal@...tlin.com>
Cc: netdev@...r.kernel.org, Russell King <linux@...linux.org.uk>,
Taras Chornyi <tchornyi@...vell.com>,
"David S. Miller" <davem@...emloft.net>,
devicetree@...r.kernel.org, Luka Perkov <luka.perkov@...tura.hr>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Eric Dumazet <edumazet@...gle.com>,
Paolo Abeni <pabeni@...hat.com>,
Robert Marko <robert.marko@...tura.hr>,
Rob Herring <robh+dt@...nel.org>,
Michael Walle <michael@...le.cc>, linux-kernel@...r.kernel.org,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Marcin Wojtas <mw@...ihalf.com>,
Vadym Kochan <vadym.kochan@...ision.eu>,
Jakub Kicinski <kuba@...nel.org>
Subject: Re: [PATCH 1/6] Revert "dt-bindings: marvell,prestera: Add
description for device-tree bindings"
On Thu, 17 Nov 2022 22:55:52 +0100, Miquel Raynal wrote:
> This reverts commit 40acc05271abc2852c32622edbebd75698736b9b.
>
> marvell,prestera.txt is an old file describing the old Alleycat3
> standalone switches. The commit mentioned above actually hacked these
> bindings to add support for a device tree property for a more modern
> version of the IP connected over PCI, using only the generic compatible
> in order to retrieve the device node from the prestera driver to read
> one static property.
>
> The problematic property discussed here is "base-mac-provider". The
> original intent was to point to a nvmem device which could produce the
> relevant nvmem-cell. This property has never been acked by DT
> maintainers and fails all the layering that has been brought with the nvmem
> bindings by pointing at a nvmem producer, bypassing the existing nvmem
> bindings, rather than a nvmem cell directly. Furthermore, the property
> cannot even be used upstream because it expected the ONIE tlv driver to
> produce a specific cell, driver which used nacked bindings and thus was
> never merged, replaced by a more integrated concept: the nvmem-layout.
>
> So let's forget about this temporary addition, safely avoiding the need
> for any backward compatibility handling. A new (yaml) binding file will
> be brought with the prestera bindings, and there we will actually
> include a description of the modern IP over PCI, including the right way
> to point to a nvmem cell.
>
> Cc: Vadym Kochan <vadym.kochan@...ision.eu>
> Cc: Taras Chornyi <tchornyi@...vell.com>
> Signed-off-by: Miquel Raynal <miquel.raynal@...tlin.com>
> ---
> .../bindings/net/marvell,prestera.txt | 34 -------------------
> 1 file changed, 34 deletions(-)
>
Acked-by: Rob Herring <robh@...nel.org>
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