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Message-ID: <20230110120549.4d764609@kernel.org> Date: Tue, 10 Jan 2023 12:05:49 -0800 From: Jakub Kicinski <kuba@...nel.org> To: "Kubalewski, Arkadiusz" <arkadiusz.kubalewski@...el.com> Cc: Jiri Pirko <jiri@...nulli.us>, Maciek Machnikowski <maciek@...hnikowski.net>, 'Vadim Fedorenko' <vfedorenko@...ek.ru>, 'Jonathan Lemon' <jonathan.lemon@...il.com>, "'Paolo Abeni'" <pabeni@...hat.com>, "netdev@...r.kernel.org" <netdev@...r.kernel.org>, "linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>, "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org> Subject: Re: [RFC PATCH v4 0/4] Create common DPLL/clock configuration API On Mon, 9 Jan 2023 14:43:01 +0000 Kubalewski, Arkadiusz wrote: > This is a simplified network switch board example. > It has 2 synchronization channels, where each channel: > - provides clk to 8 PHYs driven by separated MAC chips, > - controls 2 DPLLs. > > Basically only given FW has control over its PHYs, so also a control over it's > MUX inputs. > All external sources are shared between the channels. > > This is why we believe it is not best idea to enclose multiple DPLLs with one > object: > - sources are shared even if DPLLs are not a single synchronizer chip, > - control over specific MUX type input shall be controllable from different > driver/firmware instances. > > As we know the proposal of having multiple DPLLs in one object was a try to > simplify currently implemented shared pins. We fully support idea of having > interfaces as simple as possible, but at the same time they shall be flexible > enough to serve many use cases. I must be missing context from other discussions but what is this proposal trying to solve? Well implemented shared pins is all we need.
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