netdev - Re: [net-next 03/15] net/mlx5: Add adjphase function to support hardware-only offset control

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Message-ID: <739b308c-33ec-1886-5e9d-6c5059370d15@intel.com>
Date:   Wed, 18 Jan 2023 13:33:56 -0800
From:   Jacob Keller <jacob.e.keller@...el.com>
To:     Saeed Mahameed <saeed@...nel.org>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Eric Dumazet <edumazet@...gle.com>
CC:     Saeed Mahameed <saeedm@...dia.com>, <netdev@...r.kernel.org>,
        Tariq Toukan <tariqt@...dia.com>,
        Rahul Rameshbabu <rrameshbabu@...dia.com>,
        Gal Pressman <gal@...dia.com>
Subject: Re: [net-next 03/15] net/mlx5: Add adjphase function to support
 hardware-only offset control



On 1/18/2023 10:35 AM, Saeed Mahameed wrote:
> From: Rahul Rameshbabu <rrameshbabu@...dia.com>
> 
> The adjtime function supports using hardware to set the clock offset when
> the delta was supported by the hardware. When the delta is not supported by
> the hardware, the driver handles adjusting the clock. The newly-introduced
> adjphase function is similar to the adjtime function, except it guarantees
> that a provided clock offset will be used directly by the hardware to
> adjust the PTP clock. When the range is not acceptable by the hardware, an
> error is returned.
> 

Makes sense. Once you've verified that the delta is within the accepted
range you can just re-use the existing adjtime function.

Reviewed-by: Jacob Keller <jacob.e.keller@...el.com>

> Signed-off-by: Rahul Rameshbabu <rrameshbabu@...dia.com>
> Reviewed-by: Gal Pressman <gal@...dia.com>
> Reviewed-by: Tariq Toukan <tariqt@...dia.com>
> Signed-off-by: Saeed Mahameed <saeedm@...dia.com>
> ---
>  drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
> index 69318b143268..ecdff26a22b0 100644
> --- a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
> +++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
> @@ -326,6 +326,14 @@ static int mlx5_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
>  	return 0;
>  }
>  
> +static int mlx5_ptp_adjphase(struct ptp_clock_info *ptp, s32 delta)
> +{
> +	if (delta < S16_MIN || delta > S16_MAX)
> +		return -ERANGE;
> +
> +	return mlx5_ptp_adjtime(ptp, delta);
> +}
> +
>  static int mlx5_ptp_adjfreq_real_time(struct mlx5_core_dev *mdev, s32 freq)
>  {
>  	u32 in[MLX5_ST_SZ_DW(mtutc_reg)] = {};
> @@ -688,6 +696,7 @@ static const struct ptp_clock_info mlx5_ptp_clock_info = {
>  	.n_pins		= 0,
>  	.pps		= 0,
>  	.adjfine	= mlx5_ptp_adjfine,
> +	.adjphase	= mlx5_ptp_adjphase,
>  	.adjtime	= mlx5_ptp_adjtime,
>  	.gettimex64	= mlx5_ptp_gettimex,
>  	.settime64	= mlx5_ptp_settime,