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Date: Thu, 9 Mar 2023 05:26:15 +0000 From: Garmin Chang (張家銘) <Garmin.Chang@...iatek.com> To: "wenst@...omium.org" <wenst@...omium.org> CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "robh+dt@...nel.org" <robh+dt@...nel.org>, "mturquette@...libre.com" <mturquette@...libre.com>, "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>, "sboyd@...nel.org" <sboyd@...nel.org>, "linux-mediatek@...ts.infradead.org" <linux-mediatek@...ts.infradead.org>, Project_Global_Chrome_Upstream_Group <Project_Global_Chrome_Upstream_Group@...iatek.com>, "richardcochran@...il.com" <richardcochran@...il.com>, "linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>, "krzysztof.kozlowski+dt@...aro.org" <krzysztof.kozlowski+dt@...aro.org>, "matthias.bgg@...il.com" <matthias.bgg@...il.com>, "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>, "netdev@...r.kernel.org" <netdev@...r.kernel.org> Subject: Re: [PATCH v5 11/19] clk: mediatek: Add MT8188 vdecsys clock support On Fri, 2023-02-03 at 15:17 +0800, Chen-Yu Tsai wrote: > On Thu, Jan 19, 2023 at 8:49 PM Garmin.Chang < > Garmin.Chang@...iatek.com> wrote: > > > > Add MT8188 vdec clock controllers which provide clock gate > > control for video decoder. > > > > Signed-off-by: Garmin.Chang <Garmin.Chang@...iatek.com> > > --- > > drivers/clk/mediatek/Makefile | 2 +- > > drivers/clk/mediatek/clk-mt8188-vdec.c | 90 > > ++++++++++++++++++++++++++ > > 2 files changed, 91 insertions(+), 1 deletion(-) > > create mode 100644 drivers/clk/mediatek/clk-mt8188-vdec.c > > > > diff --git a/drivers/clk/mediatek/Makefile > > b/drivers/clk/mediatek/Makefile > > index a0fd87a882b5..7d09e9fc6538 100644 > > --- a/drivers/clk/mediatek/Makefile > > +++ b/drivers/clk/mediatek/Makefile > > @@ -86,7 +86,7 @@ obj-$(CONFIG_COMMON_CLK_MT8186) += clk-mt8186- > > mcu.o clk-mt8186-topckgen.o clk-mt > > obj-$(CONFIG_COMMON_CLK_MT8188) += clk-mt8188-apmixedsys.o clk- > > mt8188-topckgen.o \ > > clk-mt8188-peri_ao.o clk-mt8188- > > infra_ao.o \ > > clk-mt8188-cam.o clk-mt8188- > > ccu.o clk-mt8188-img.o \ > > - clk-mt8188-ipe.o clk-mt8188- > > mfg.o > > + clk-mt8188-ipe.o clk-mt8188- > > mfg.o clk-mt8188-vdec.o > > obj-$(CONFIG_COMMON_CLK_MT8192) += clk-mt8192.o > > obj-$(CONFIG_COMMON_CLK_MT8192_AUDSYS) += clk-mt8192-aud.o > > obj-$(CONFIG_COMMON_CLK_MT8192_CAMSYS) += clk-mt8192-cam.o > > diff --git a/drivers/clk/mediatek/clk-mt8188-vdec.c > > b/drivers/clk/mediatek/clk-mt8188-vdec.c > > new file mode 100644 > > index 000000000000..e05a27957136 > > --- /dev/null > > +++ b/drivers/clk/mediatek/clk-mt8188-vdec.c > > @@ -0,0 +1,90 @@ > > +// SPDX-License-Identifier: GPL-2.0-only > > +// > > +// Copyright (c) 2022 MediaTek Inc. > > +// Author: Garmin Chang <garmin.chang@...iatek.com> > > + > > +#include <linux/clk-provider.h> > > +#include <linux/platform_device.h> > > +#include <dt-bindings/clock/mediatek,mt8188-clk.h> > > + > > +#include "clk-gate.h" > > +#include "clk-mtk.h" > > + > > +static const struct mtk_gate_regs vde0_cg_regs = { > > Could you replace all instances of "vde" (both upper and lower case) > with "vdec" to be consistent with usages elsewhere? Thank you for your suggestions. OK, I will modify this series in v6. > > > + .set_ofs = 0x0, > > + .clr_ofs = 0x4, > > + .sta_ofs = 0x0, > > +}; > > + > > +static const struct mtk_gate_regs vde1_cg_regs = { > > + .set_ofs = 0x200, > > + .clr_ofs = 0x204, > > + .sta_ofs = 0x200, > > +}; > > + > > +static const struct mtk_gate_regs vde2_cg_regs = { > > + .set_ofs = 0x8, > > + .clr_ofs = 0xc, > > + .sta_ofs = 0x8, > > +}; > > + > > +#define GATE_VDE0(_id, _name, _parent, _shift) \ > > + GATE_MTK(_id, _name, _parent, &vde0_cg_regs, _shift, > > &mtk_clk_gate_ops_setclr_inv) > > + > > +#define GATE_VDE1(_id, _name, _parent, _shift) \ > > + GATE_MTK(_id, _name, _parent, &vde1_cg_regs, _shift, > > &mtk_clk_gate_ops_setclr_inv) > > + > > +#define GATE_VDE2(_id, _name, _parent, _shift) \ > > + GATE_MTK(_id, _name, _parent, &vde2_cg_regs, _shift, > > &mtk_clk_gate_ops_setclr_inv) > > + > > +static const struct mtk_gate vde1_clks[] = { > > + /* VDE1_0 */ > > + GATE_VDE0(CLK_VDE1_SOC_VDEC, "vde1_soc_vdec", "top_vdec", > > 0), > > + GATE_VDE0(CLK_VDE1_SOC_VDEC_ACTIVE, "vde1_soc_vdec_active", > > "top_vdec", 4), > > + GATE_VDE0(CLK_VDE1_SOC_VDEC_ENG, "vde1_soc_vdec_eng", > > "top_vdec", 8), > > + /* VDE1_1 */ > > + GATE_VDE1(CLK_VDE1_SOC_LAT, "vde1_soc_lat", "top_vdec", 0), > > + GATE_VDE1(CLK_VDE1_SOC_LAT_ACTIVE, "vde1_soc_lat_active", > > "top_vdec", 4), > > + GATE_VDE1(CLK_VDE1_SOC_LAT_ENG, "vde1_soc_lat_eng", > > "top_vdec", 8), > > + /* VDE12 */ > > Add an underscore like the above? > > ChenYu OK, I will add underscore in v6. > > > + GATE_VDE2(CLK_VDE1_SOC_LARB1, "vde1_soc_larb1", "top_vdec", > > 0), > > +}; > > + > > +static const struct mtk_gate vde2_clks[] = { > > + /* VDE2_0 */ > > + GATE_VDE0(CLK_VDE2_VDEC, "vde2_vdec", "top_vdec", 0), > > + GATE_VDE0(CLK_VDE2_VDEC_ACTIVE, "vde2_vdec_active", > > "top_vdec", 4), > > + GATE_VDE0(CLK_VDE2_VDEC_ENG, "vde2_vdec_eng", "top_vdec", > > 8), > > + /* VDE2_1 */ > > + GATE_VDE1(CLK_VDE2_LAT, "vde2_lat", "top_vdec", 0), > > + /* VDE2_2 */ > > + GATE_VDE2(CLK_VDE2_LARB1, "vde2_larb1", "top_vdec", 0), > > +}; > > + > > +static const struct mtk_clk_desc vde1_desc = { > > + .clks = vde1_clks, > > + .num_clks = ARRAY_SIZE(vde1_clks), > > +}; > > + > > +static const struct mtk_clk_desc vde2_desc = { > > + .clks = vde2_clks, > > + .num_clks = ARRAY_SIZE(vde2_clks), > > +}; > > + > > +static const struct of_device_id of_match_clk_mt8188_vde[] = { > > + { .compatible = "mediatek,mt8188-vdecsys-soc", .data = > > &vde1_desc }, > > + { .compatible = "mediatek,mt8188-vdecsys", .data = > > &vde2_desc }, > > + { /* sentinel */ } > > +}; > > + > > +static struct platform_driver clk_mt8188_vde_drv = { > > + .probe = mtk_clk_simple_probe, > > + .remove = mtk_clk_simple_remove, > > + .driver = { > > + .name = "clk-mt8188-vde", > > + .of_match_table = of_match_clk_mt8188_vde, > > + }, > > +}; > > + > > +builtin_platform_driver(clk_mt8188_vde_drv); > > +MODULE_LICENSE("GPL"); > > -- > > 2.18.0 > > > >
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