netdev - Re: [PATCH net-next 2/6] mlxsw: reg: Add Management Capabilities Mask Register

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Message-ID: <ZCBP5dymVMTYA9Pf@corigine.com>
Date:   Sun, 26 Mar 2023 16:00:05 +0200
From:   Simon Horman <simon.horman@...igine.com>
To:     Petr Machata <petrm@...dia.com>
Cc:     "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>, netdev@...r.kernel.org,
        Ido Schimmel <idosch@...dia.com>,
        Amit Cohen <amcohen@...dia.com>, mlxsw@...dia.com
Subject: Re: [PATCH net-next 2/6] mlxsw: reg: Add Management Capabilities
 Mask Register

On Wed, Mar 22, 2023 at 05:49:31PM +0100, Petr Machata wrote:
> From: Amit Cohen <amcohen@...dia.com>
> 
> MCAM register reports the device supported management features. Querying
> this register exposes if features are supported with the current firmware
> version in the current ASIC. Then, the drive can separate between different
> implementations dynamically.
> 
> MCAM register supports querying whether a new reset flow (which includes
> PCI reset) is supported or not. Add support for the register as preparation
> for support of the new reset flow.
> 
> Note that the access to the bits in the field 'mng_feature_cap_mask' is
> not same to other mask fields in other registers. In most of the cases
> bit #0 is the first one in the last dword, in MCAM register, bits #0-#31
> are in the first dword and so on. Declare the mask field using bits arrays
> per dword to simplify the access.
> 
> Signed-off-by: Amit Cohen <amcohen@...dia.com>
> Reviewed-by: Petr Machata <petrm@...dia.com>
> Signed-off-by: Petr Machata <petrm@...dia.com>

Reviewed-by: Simon Horman <simon.horman@...igine.com>