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Date:   Fri, 7 Apr 2023 00:43:41 +0300
From:   Arınç ÜNAL <arinc.unal@...nc9.com>
To:     "Russell King (Oracle)" <linux@...linux.org.uk>
Cc:     Sean Wang <sean.wang@...iatek.com>,
        Landen Chao <Landen.Chao@...iatek.com>,
        DENG Qingfang <dqfext@...il.com>,
        Daniel Golle <daniel@...rotopia.org>,
        Andrew Lunn <andrew@...n.ch>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vladimir Oltean <olteanv@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        erkin.bozoglu@...ont.com, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org
Subject: Re: [RFC PATCH net-next] net: dsa: mt7530: fix port specifications
 for MT7988

On 6.04.2023 14:07, Russell King (Oracle) wrote:
> On Thu, Apr 06, 2023 at 01:04:45PM +0300, arinc9.unal@...il.com wrote:
>> From: Arınç ÜNAL <arinc.unal@...nc9.com>
>>
>> On the switch on the MT7988 SoC, there are only 4 PHYs. There's only port 6
>> as the CPU port, there's no port 5. Split the switch statement with a check
>> to enforce these for the switch on the MT7988 SoC. The internal phy-mode is
>> specific to MT7988 so put it for MT7988 only.
>>
>> Signed-off-by: Arınç ÜNAL <arinc.unal@...nc9.com>
>> ---
>>
>> Daniel, this is based on the information you provided me about the switch.
>> I will add this to my current patch series if it looks good to you.
>>
>> Arınç
>>
>> ---
>>   drivers/net/dsa/mt7530.c | 67 ++++++++++++++++++++++++++--------------
>>   1 file changed, 43 insertions(+), 24 deletions(-)
>>
>> diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
>> index 6fbbdcb5987f..f167fa135ef1 100644
>> --- a/drivers/net/dsa/mt7530.c
>> +++ b/drivers/net/dsa/mt7530.c
>> @@ -2548,7 +2548,7 @@ static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port,
>>   	phy_interface_zero(config->supported_interfaces);
>>   
>>   	switch (port) {
>> -	case 0 ... 4: /* Internal phy */
>> +	case 0 ... 3: /* Internal phy */
>>   		__set_bit(PHY_INTERFACE_MODE_INTERNAL,
>>   			  config->supported_interfaces);
>>   		break;
>> @@ -2710,37 +2710,56 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
>>   	struct mt7530_priv *priv = ds->priv;
>>   	u32 mcr_cur, mcr_new;
>>   
>> -	switch (port) {
>> -	case 0 ... 4: /* Internal phy */
>> -		if (state->interface != PHY_INTERFACE_MODE_GMII &&
>> -		    state->interface != PHY_INTERFACE_MODE_INTERNAL)
>> -			goto unsupported;
>> -		break;
>> -	case 5: /* Port 5, a CPU port. */
>> -		if (priv->p5_interface == state->interface)
>> +	if (priv->id == ID_MT7988) {
>> +		switch (port) {
>> +		case 0 ... 3: /* Internal phy */
>> +			if (state->interface != PHY_INTERFACE_MODE_INTERNAL)
> 
> How do these end up with PHY_INTERFACE_MODE_INTERNAL ? phylib defaults
> to GMII mode without something else being specified in DT.
> 
> Also note that you should *not* be validating state->interface in the
> mac_config() method because it's way too late to reject it - if you get
> an unsupported interface here, then that is down to the get_caps()
> method being buggy. Only report interfaces in get_caps() that you are
> prepared to handle in the rest of the system.

This is already the case for all three get_caps(). The supported 
interfaces for each port are properly defined.

Though mt7988_mac_port_get_caps() clears the 
config->supported_interfaces bitmap before reporting the supported 
interfaces. I don't think this is needed as all bits in the bitmap 
should already be initialized to zero when the phylink_config structure 
is allocated.

I'm not sure if your suggestion is to make sure the supported interfaces 
are properly reported on get_caps(), or validate state->interface 
somewhere else.

Arınç

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