| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <9e5da8b1-bd47-307c-da75-580df4d575f6@microchip.com>
Date: Wed, 19 Apr 2023 14:40:29 +0000
From: <Parthiban.Veerasooran@...rochip.com>
To: <ramon.nordin.rodriguez@...roamp.se>, <andrew@...n.ch>,
<hkallweit1@...il.com>, <linux@...linux.org.uk>,
<davem@...emloft.net>, <edumazet@...gle.com>, <kuba@...nel.org>,
<pabeni@...hat.com>
CC: <netdev@...r.kernel.org>, <Jan.Huber@...rochip.com>,
<Horatiu.Vultur@...rochip.com>, <Woojung.Huh@...rochip.com>
Subject: Re: [PATCH] drivers/net/phy: add driver for Microchip LAN867x
10BASE-T1S PHY
Hi Ramon,
Good day...! This is Parthiban from Microchip.
Thanks for your patches for the Microchip LAN867x 10BASE-T1S PHY. We
really appreciate your effort on this.
For your kind information, we are already working for the driver which
supports all the 10BASE-T1S PHYs from Microchip and doing internal
review of those driver patches to mainline. These patches are going to
reach mainline in couple of days. It is very unfortunate that we two are
working on the same task at the same time without knowing each other.
The architecture of your patch is similar to our current implementation.
However to be able to support also the upcoming 10BASE-T1S products
e.g., the LAN865x 10BASE-T1S MAC-PHY, additional functionalities have to
be implemented. In order to avoid unnecessary/redundant work on both
sides, we would like to collaborate with you on this topic and have a
sync outside of this mailing list before going forward.
Best Regards,
Parthiban V
On 18/04/23 11:22 pm, Ramón Nordin Rodriguez wrote:
> [Some people who received this message don't often get email from ramon.nordin.rodriguez@...roamp.se. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> This patch adds support for the Microchip LAN867x 10BASE-T1S family
> (LAN8670/1/2). The driver supports P2MP with PLCA.
>
> Signed-off-by: Ramón Nordin Rodriguez <ramon.nordin.rodriguez@...roamp.se>
> ---
> drivers/net/phy/Kconfig | 5 ++
> drivers/net/phy/Makefile | 1 +
> drivers/net/phy/lan867x.c | 144 ++++++++++++++++++++++++++++++++++++++
> 3 files changed, 150 insertions(+)
> create mode 100644 drivers/net/phy/lan867x.c
>
> diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
> index 54874555c921..63ba7f51087e 100644
> --- a/drivers/net/phy/Kconfig
> +++ b/drivers/net/phy/Kconfig
> @@ -284,6 +284,11 @@ config NCN26000_PHY
> Currently supports the NCN26000 10BASE-T1S Industrial PHY
> with MII interface.
>
> +config LAN867X_PHY
> + tristate "Microchip 10BASE-T1S Ethernet PHY"
> + help
> + Currently supports the LAN8670, LAN8671, LAN8672
> +
> config AT803X_PHY
> tristate "Qualcomm Atheros AR803X PHYs and QCA833x PHYs"
> depends on REGULATOR
> diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
> index b5138066ba04..a12c2f296297 100644
> --- a/drivers/net/phy/Makefile
> +++ b/drivers/net/phy/Makefile
> @@ -78,6 +78,7 @@ obj-$(CONFIG_MICROSEMI_PHY) += mscc/
> obj-$(CONFIG_MOTORCOMM_PHY) += motorcomm.o
> obj-$(CONFIG_NATIONAL_PHY) += national.o
> obj-$(CONFIG_NCN26000_PHY) += ncn26000.o
> +obj-$(CONFIG_LAN867X_PHY) += lan867x.o
> obj-$(CONFIG_NXP_C45_TJA11XX_PHY) += nxp-c45-tja11xx.o
> obj-$(CONFIG_NXP_TJA11XX_PHY) += nxp-tja11xx.o
> obj-$(CONFIG_QSEMI_PHY) += qsemi.o
> diff --git a/drivers/net/phy/lan867x.c b/drivers/net/phy/lan867x.c
> new file mode 100644
> index 000000000000..c861c46ed06b
> --- /dev/null
> +++ b/drivers/net/phy/lan867x.c
> @@ -0,0 +1,144 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Driver for Microchip 10BASE-T1S LAN867X PHY
> + *
> + * Support: Microchip Phys:
> + * lan8670, lan8671, lan8672
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/phy.h>
> +
> +#define PHY_ID_LAN867X 0x0007C160
> +
> +#define LAN867X_REG_IRQ_1_CTL 0x001C
> +#define LAN867X_REG_IRQ_2_CTL 0x001D
> +
> +static int lan867x_config_init(struct phy_device *phydev)
> +{
> + /* HW quirk: Microchip states in the application note (AN1699) for the phy
> + * that a set of read-modify-write (rmw) operations has to be performed
> + * on a set of seemingly magic registers.
> + * The result of these operations is just described as 'optimal performance'
> + * Microchip gives no explanation as to what these mmd regs do,
> + * in fact they are marked as reserved in the datasheet.
> + */
> +
> + /* The arrays below are pulled from the following table from AN1699
> + * Access MMD Address Value Mask
> + * RMW 0x1F 0x00D0 0x0002 0x0E03
> + * RMW 0x1F 0x00D1 0x0000 0x0300
> + * RMW 0x1F 0x0084 0x3380 0xFFC0
> + * RMW 0x1F 0x0085 0x0006 0x000F
> + * RMW 0x1F 0x008A 0xC000 0xF800
> + * RMW 0x1F 0x0087 0x801C 0x801C
> + * RMW 0x1F 0x0088 0x033F 0x1FFF
> + * W 0x1F 0x008B 0x0404 ------
> + * RMW 0x1F 0x0080 0x0600 0x0600
> + * RMW 0x1F 0x00F1 0x2400 0x7F00
> + * RMW 0x1F 0x0096 0x2000 0x2000
> + * W 0x1F 0x0099 0x7F80 ------
> + */
> +
> + const int registers[12] = {
> + 0x00D0, 0x00D1, 0x0084, 0x0085,
> + 0x008A, 0x0087, 0x0088, 0x008B,
> + 0x0080, 0x00F1, 0x0096, 0x0099,
> + };
> +
> + const int masks[12] = {
> + 0x0E03, 0x0300, 0xFFC0, 0x000F,
> + 0xF800, 0x801C, 0x1FFF, 0xFFFF,
> + 0x0600, 0x7F00, 0x2000, 0xFFFF,
> + };
> +
> + const int values[12] = {
> + 0x0002, 0x0000, 0x3380, 0x0006,
> + 0xC000, 0x801C, 0x033F, 0x0404,
> + 0x0600, 0x2400, 0x2000, 0x7F80,
> + };
> +
> + int err;
> + int reg;
> + int reg_value;
> +
> + /* Read-Modified Write Pseudocode (from AN1699)
> + * current_val = read_register(mmd, addr) // Read current register value
> + * new_val = current_val AND (NOT mask) // Clear bit fields to be written
> + * new_val = new_val OR value // Set bits
> + * write_register(mmd, addr, new_val) // Write back updated register value
> + */
> + for (int i = 0; i < ARRAY_SIZE(registers); i++) {
> + reg = registers[i];
> + reg_value = phy_read_mmd(phydev, MDIO_MMD_VEND2, reg);
> + reg_value &= ~masks[i];
> + reg_value |= values[i];
> + err = phy_write_mmd(phydev, MDIO_MMD_VEND2, reg, reg_value);
> + if (err != 0)
> + return err;
> + }
> +
> + return 0;
> +}
> +
> +static int lan867x_config_interrupt(struct phy_device *phydev)
> +{
> + /* None of the interrupts in the lan867x phy seem relevant.
> + * Other phys inspect the link status and call phy_trigger_machine
> + * on change.
> + * This phy does not support link status, and thus has no interrupt
> + * for it either.
> + * So we'll just disable all interrupts instead.
> + */
> +
> + int err;
> +
> + err = phy_write_mmd(phydev, MDIO_MMD_VEND2, LAN867X_REG_IRQ_1_CTL, 0xFFFF);
> + if (err)
> + return err;
> + err = phy_write_mmd(phydev, MDIO_MMD_VEND2, LAN867X_REG_IRQ_2_CTL, 0xFFFF);
> + return err;
> +}
> +
> +static int lan867x_read_status(struct phy_device *phydev)
> +{
> + /* The phy has some limitations, namely:
> + * - always reports link up
> + * - only supports 10MBit half duplex
> + * - does not support auto negotiate
> + */
> + phydev->link = 1;
> + phydev->duplex = DUPLEX_HALF;
> + phydev->speed = SPEED_10;
> + phydev->autoneg = AUTONEG_DISABLE;
> +
> + return 0;
> +}
> +
> +static struct phy_driver lan867x_driver[] = {
> + {
> + PHY_ID_MATCH_MODEL(PHY_ID_LAN867X),
> + .name = "LAN867X",
> + .features = PHY_BASIC_T1S_P2MP_FEATURES,
> + .config_init = lan867x_config_init,
> + .config_intr = lan867x_config_interrupt,
> + .read_status = lan867x_read_status,
> + .get_plca_cfg = genphy_c45_plca_get_cfg,
> + .set_plca_cfg = genphy_c45_plca_set_cfg,
> + .get_plca_status = genphy_c45_plca_get_status,
> + }
> +};
> +
> +module_phy_driver(lan867x_driver);
> +
> +static struct mdio_device_id __maybe_unused tbl[] = {
> + { PHY_ID_MATCH_MODEL(PHY_ID_LAN867X) },
> + { }
> +};
> +
> +MODULE_DEVICE_TABLE(mdio, tbl);
> +
> +MODULE_DESCRIPTION("Microchip 10BASE-T1S lan867x Phy driver");
> +MODULE_AUTHOR("Ramón Nordin Rodriguez");
> +MODULE_LICENSE("GPL");
> --
> 2.39.2
>
Powered by blists - more mailing lists