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Message-ID: <4797433.GXAFRqVoOG@steina-w>
Date:   Mon, 24 Apr 2023 16:02:23 +0200
From:   Alexander Stein <alexander.stein@...tq-group.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>,
        "David S . Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Christian Marangi <ansuelsmth@...il.com>,
        netdev@...r.kernel.org
Subject: Re: [PATCH 1/1] net: phy: Fix reading LED reg property

Hi Andrew,

Am Montag, 24. April 2023, 15:47:14 CEST schrieb Andrew Lunn:
> On Mon, Apr 24, 2023 at 03:40:02PM +0200, Alexander Stein wrote:
> > 'reg' is always encoded in 32 bits, thus it has to be read using the
> > function with the corresponding bit width.
> 
> Hi Alexander
> 
> Is this an endian thing? Does it return the wrong value on big endian
> systems?

It is an endian issue, but the platform's endianess doesn't matter here. The 
encoding for device properties is (always) big-endian, so a 32-bit 'reg' value 
of '2' looks like this:

$ hexdump -C /sys/firmware/devicetree/base/soc@...us@...00000/
ethernet@...f0000/mdio/ethernet-phy@...eds/led@...eg
00000000  00 00 00 02                                       |....|
00000004

Using of_property_read_u8 will only read the first byte, thus all values of 
reg result in 0.

> I deliberately used of_property_read_u8() because it will perform a
> range check, and if the value is bigger or smaller than 0-256 it will
> return an error. Your change does not include such range checks, which
> i don't like.

Sure, I can added this check.

Best regards,
Alexander
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