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Message-ID: <d0f5a242-6f11-4a8d-57e7-92bba7a9365a@intel.com> Date: Sun, 14 May 2023 14:30:48 +0300 From: "Neftin, Sasha" <sasha.neftin@...el.com> To: <kovalev@...linux.org>, <jesse.brandeburg@...el.com>, <anthony.l.nguyen@...el.com>, <davem@...emloft.net>, <kuba@...nel.org>, <jeffrey.t.kirsher@...el.com>, <intel-wired-lan@...ts.osuosl.org>, <netdev@...r.kernel.org>, <linux-kernel@...r.kernel.org>, "Ruinskiy, Dima" <dima.ruinskiy@...el.com>, "Neftin, Sasha" <sasha.neftin@...el.com>, "Fuxbrumer, Devora" <devora.fuxbrumer@...el.com>, naamax.meir <naamax.meir@...ux.intel.com>, "Avivi, Amir" <amir.avivi@...el.com> Subject: Re: [PATCH] e1000e: Add "cnp" PCH boards to the packet loss fixing workaround On 5/14/2023 12:34, kovalev@...linux.org wrote: > From: Vasiliy Kovalev <kovalev@...linux.org> > > Add CannonLake and some Comet Lake Client Platform into the range > of workaround for packet loss issue. > > Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=217436 > Fixes: 639e298f432fb0 ("e1000e: Fix packet loss on Tiger Lake and later") > Signed-off-by: Vasiliy Kovalev <kovalev@...linux.org> > --- > drivers/net/ethernet/intel/e1000e/ich8lan.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c > index 9466f65a6da77..e233a0b93bcf1 100644 > --- a/drivers/net/ethernet/intel/e1000e/ich8lan.c > +++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c > @@ -4875,7 +4875,7 @@ static s32 e1000_init_hw_ich8lan(struct e1000_hw *hw) > /* Enable workaround for packet loss issue on TGP PCH %s/TGP/CMP - In case we go in this direction. > * Do not gate DMA clock from the modPHY block > */ > - if (mac->type >= e1000_pch_tgp) { > + if (mac->type >= e1000_pch_cnp) { > fflt_dbg = er32(FFLT_DBG); > fflt_dbg |= E1000_FFLT_DBG_DONT_GATE_WAKE_DMA_CLK; > ew32(FFLT_DBG, fflt_dbg); It is a bit better. Let's clarify a few points before continuing. 1. I realized all components on your board are ADL-P. (lspci_npk.txt). I now aware (I will ask around) about combination of ADL and old 1Gbe controller. Where did you get this board? My concern is that the wrong BIOS/IFWI is in use for this platform. 1Gbe controller may come up with corrupted initial HW values. (NVM of controller is corrupted, in this case, we will face a much worst platform behavior) 2. Need confirmation that writing to the 'FFLT_DBG' register is harmless for the CML platform.
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