Message-ID: <CAHp75VfuB5dHp1U+G2OFpupMnbBJv=aHRWaBHemtPU-xOZA_3g@mail.gmail.com>
Date: Thu, 18 May 2023 15:27:00 +0300
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Jiawen Wu <jiawenwu@...stnetic.com>, Michael Walle <michael@...le.cc>
Cc: Andrew Lunn <andrew@...n.ch>, netdev@...r.kernel.org, jarkko.nikula@...ux.intel.com, 
	andriy.shevchenko@...ux.intel.com, mika.westerberg@...ux.intel.com, 
	jsd@...ihalf.com, Jose.Abreu@...opsys.com, hkallweit1@...il.com, 
	linux@...linux.org.uk, linux-i2c@...r.kernel.org, linux-gpio@...r.kernel.org, 
	mengyuanlou@...-swift.com
Subject: Re: [PATCH net-next v8 6/9] net: txgbe: Support GPIO to SFP socket

On Thu, May 18, 2023 at 2:50 PM Jiawen Wu <jiawenwu@...stnetic.com> wrote:
> On Wednesday, May 17, 2023 11:01 PM, Andrew Lunn wrote:
> > On Wed, May 17, 2023 at 10:55:01AM +0800, Jiawen Wu wrote:

...

> > > I should provide gpio_regmap_config.irq_domain if I want to add the gpio_irq_chip.
> > > But in this use, GPIO IRQs are requested by SFP driver. How can I get irq_domain
> > > before SFP probe? And where do I add IRQ parent handler?
> >
> > I _think_ you are mixing upstream IRQs and downstream IRQs.
> >
> > Interrupts are arranged in trees. The CPU itself only has one or two
> > interrupts. e.g. for ARM you have FIQ and IRQ. When the CPU gets an
> > interrupt, you look in the interrupt controller to see what external
> > or internal interrupt triggered the CPU interrupt. And that interrupt
> > controller might indicate the interrupt came from another interrupt
> > controller. Hence the tree structure. And each node in the tree is
> > considered an interrupt domain.
> >
> > A GPIO controller can also be an interrupt controller. It has an
> > upstream interrupt, going to the controller above it. And it has
> > downstream interrupts, the GPIO lines coming into it which can cause
> > an interrupt. And the GPIO interrupt controller is a domain.
> >
> > So what exactly does gpio_regmap_config.irq_domain mean? Is it the
> > domain of the upstream interrupt controller? Is it an empty domain
> > structure to be used by the GPIO interrupt controller? It is very
> > unlikely to have anything to do with the SFP devices below it.
>
> Sorry, since I don't know much about interrupt,  it is difficult to understand
> regmap-irq in a short time. There are many questions about regmap-irq.

That's why I Cc'ed to Michael who is the author of gpio-regmap to
probably get advice from.

> When I want to add an IRQ chip for regmap, for the further irq_domain,
> I need to pass a parameter of IRQ, and this IRQ will be requested with handler:
> regmap_irq_thread(). Which IRQ does it mean? In the previous code of using
> devm_gpiochip_add_data(), I set the MSI-X interrupt as gpio-irq's parent, but
> it was used to set chained handler only. Should the parent be this IRQ? I found
> the error with irq_free_descs and irq_domain_remove when I remove txgbe.ko.
>
> As you said, the interrupt of each tree node has its domain. Can I understand
> that there are two layer in the interrupt tree for MSI-X and GPIOs, and requesting
> them separately is not conflicting? Although I thought so, but after I implement
> gpio-regmap, SFP driver even could not find gpio_desc. Maybe I missed something
> on registering gpio-regmap...
>
> Anyway it is a bit complicated, could I use this version of GPIO implementation if
> it's really tough?

It's possible but from GPIO subsystem point of view it's discouraged
as long as there is no technical impediment to go the regmap way.

-- 
With Best Regards,
Andy Shevchenko

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