lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Message-Id: <20230522121532.86610-14-arinc.unal@arinc9.com> Date: Mon, 22 May 2023 15:15:15 +0300 From: arinc9.unal@...il.com To: Sean Wang <sean.wang@...iatek.com>, Landen Chao <Landen.Chao@...iatek.com>, DENG Qingfang <dqfext@...il.com>, Daniel Golle <daniel@...rotopia.org>, Andrew Lunn <andrew@...n.ch>, Florian Fainelli <f.fainelli@...il.com>, Vladimir Oltean <olteanv@...il.com>, "David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Matthias Brugger <matthias.bgg@...il.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>, Russell King <linux@...linux.org.uk> Cc: Arınç ÜNAL <arinc.unal@...nc9.com>, Richard van Schagen <richard@...terhints.com>, Richard van Schagen <vschagen@...com>, Frank Wunderlich <frank-w@...lic-files.de>, Bartel Eerdekens <bartel.eerdekens@...stell8.be>, erkin.bozoglu@...ont.com, mithat.guner@...ont.com, netdev@...r.kernel.org, linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org Subject: [PATCH net-next 13/30] net: dsa: mt7530: move enabling port 6 to mt7530_setup_port6() From: Arınç ÜNAL <arinc.unal@...nc9.com> Enable port 6 only when port 6 is being used. Update the comment on mt7530_setup() with a better explanation. Do not set MHWTRAP_MANUAL on mt7530_setup_port5() as it's already done on mt7530_setup() beforehand. Tested-by: Arınç ÜNAL <arinc.unal@...nc9.com> Signed-off-by: Arınç ÜNAL <arinc.unal@...nc9.com> --- drivers/net/dsa/mt7530.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index fa48273269c4..47b89193d4cc 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -406,6 +406,8 @@ mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface) struct mt7530_priv *priv = ds->priv; u32 ncpo1, ssc_delta, trgint, xtal; + mt7530_clear(priv, MT7530_MHWTRAP, MHWTRAP_P6_DIS); + xtal = mt7530_read(priv, MT7530_HWTRAP) & HWTRAP_XTAL_MASK; switch (interface) { @@ -897,7 +899,7 @@ static void mt7530_setup_port5(struct dsa_switch *ds, phy_interface_t interface) val = mt7530_read(priv, MT7530_MHWTRAP); - val |= MHWTRAP_MANUAL | MHWTRAP_P5_MAC_SEL | MHWTRAP_P5_DIS; + val |= MHWTRAP_P5_MAC_SEL | MHWTRAP_P5_DIS; val &= ~MHWTRAP_P5_RGMII_MODE & ~MHWTRAP_PHY0_SEL; switch (priv->p5_intf_sel) { @@ -2221,9 +2223,11 @@ mt7530_setup(struct dsa_switch *ds) mt7530_rmw(priv, MT7530_TRGMII_RD(i), RD_TAP_MASK, RD_TAP(16)); - /* Enable port 6 */ + /* Directly access the PHY registers via C_MDC/C_MDIO. The bit that + * enables modifying the hardware trap must be set for this. + */ val = mt7530_read(priv, MT7530_MHWTRAP); - val &= ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS; + val &= ~MHWTRAP_PHY_ACCESS; val |= MHWTRAP_MANUAL; mt7530_write(priv, MT7530_MHWTRAP, val); -- 2.39.2
Powered by blists - more mailing lists