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Message-ID: <f0769755-6d04-4bf5-a273-c19b1b76f7f6@lunn.ch> Date: Mon, 22 May 2023 14:43:53 +0200 From: Andrew Lunn <andrew@...n.ch> To: Parthiban Veerasooran <Parthiban.Veerasooran@...rochip.com> Cc: hkallweit1@...il.com, linux@...linux.org.uk, davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org, pabeni@...hat.com, netdev@...r.kernel.org, linux-kernel@...r.kernel.org, ramon.nordin.rodriguez@...roamp.se, horatiu.vultur@...rochip.com, Woojung.Huh@...rochip.com, Nicolas.Ferre@...rochip.com, Thorsten.Kummermehr@...rochip.com Subject: Re: [PATCH net-next v2 4/6] net: phy: microchip_t1s: fix reset complete status handling On Mon, May 22, 2023 at 05:03:29PM +0530, Parthiban Veerasooran wrote: > As per the datasheet DS-LAN8670-1-2-60001573C.pdf, the Reset Complete > status bit in the STS2 register to be checked before proceeding for the > initial configuration. Is this the unmaskable interrupt status bit which needs clearing? There is no mention of interrupts here. Andrew
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