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Message-ID: <e0ea8a35-3ea6-43a5-bb5b-a914f86cd492@lunn.ch>
Date: Wed, 24 May 2023 14:03:42 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Parthiban.Veerasooran@...rochip.com
Cc: hkallweit1@...il.com, linux@...linux.org.uk, davem@...emloft.net,
	edumazet@...gle.com, kuba@...nel.org, pabeni@...hat.com,
	netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
	ramon.nordin.rodriguez@...roamp.se, Horatiu.Vultur@...rochip.com,
	Woojung.Huh@...rochip.com, Nicolas.Ferre@...rochip.com,
	Thorsten.Kummermehr@...rochip.com
Subject: Re: [PATCH net-next v2 4/6] net: phy: microchip_t1s: fix reset
 complete status handling

> As per the datasheet DS-LAN8670-1-2-60001573C.pdf, during the Power ON 
> Reset(POR)/Hard Reset/Soft Reset, the Reset Complete status bit in the 
> STS2 register to be checked before proceeding for the initial 

register _has_ to be checked before proceeding _to_ the initial

> configuration. Reading STS2 register will also clear the Reset Complete 
> interrupt which is non-maskable.

Otherwise, this is O.K.

	Andrew

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