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Message-ID: <07fb7d24-93c3-6090-d17c-e799df7c3283@microchip.com>
Date: Wed, 24 May 2023 13:21:42 +0000
From: <Parthiban.Veerasooran@...rochip.com>
To: <andrew@...n.ch>
CC: <hkallweit1@...il.com>, <linux@...linux.org.uk>, <davem@...emloft.net>,
	<edumazet@...gle.com>, <kuba@...nel.org>, <pabeni@...hat.com>,
	<netdev@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<ramon.nordin.rodriguez@...roamp.se>, <Horatiu.Vultur@...rochip.com>,
	<Woojung.Huh@...rochip.com>, <Nicolas.Ferre@...rochip.com>,
	<Thorsten.Kummermehr@...rochip.com>
Subject: Re: [PATCH net-next v2 4/6] net: phy: microchip_t1s: fix reset
 complete status handling

Hi Andrew,

On 24/05/23 5:33 pm, Andrew Lunn wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
>> As per the datasheet DS-LAN8670-1-2-60001573C.pdf, during the Power ON
>> Reset(POR)/Hard Reset/Soft Reset, the Reset Complete status bit in the
>> STS2 register to be checked before proceeding for the initial
> 
> register _has_ to be checked before proceeding _to_ the initial
> 
>> configuration. Reading STS2 register will also clear the Reset Complete
>> interrupt which is non-maskable.
> 
> Otherwise, this is O.K.
Thanks for your feedback. I will prepare the next version and send for 
the review.

Best Regards,
Parthiban V
> 
>          Andrew
> 

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