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Message-ID: <ZG+oOVWuKnwE0IB2@builder>
Date: Thu, 25 May 2023 20:26:01 +0200
From: Ramón Nordin Rodriguez <ramon.nordin.rodriguez@...roamp.se>
To: Parthiban Veerasooran <Parthiban.Veerasooran@...rochip.com>
Cc: andrew@...n.ch, hkallweit1@...il.com, linux@...linux.org.uk,
davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
pabeni@...hat.com, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org, horatiu.vultur@...rochip.com,
Woojung.Huh@...rochip.com, Nicolas.Ferre@...rochip.com,
Thorsten.Kummermehr@...rochip.com
Subject: Re: [PATCH net-next v3 4/6] net: phy: microchip_t1s: fix reset
complete status handling
> + /* Read STS2 register and check for the Reset Complete status to do the
> + * init configuration. If the Reset Complete is not set, wait for 5us
> + * and then read STS2 register again and check for Reset Complete status.
> + * Still if it is failed then declare PHY reset error or else proceed
> + * for the PHY initial register configuration.
> + */
> + err = phy_read_mmd(phydev, MDIO_MMD_VEND2, LAN867X_REG_STS2);
> + if (err < 0)
> + return err;
> +
> + if (!(err & LAN867x_RESET_COMPLETE_STS)) {
> + udelay(5);
> + err = phy_read_mmd(phydev, MDIO_MMD_VEND2, LAN867X_REG_STS2);
> + if (err < 0)
> + return err;
> + if (!(err & LAN867x_RESET_COMPLETE_STS)) {
> + phydev_err(phydev, "PHY reset failed\n");
> + return -ENODEV;
> + }
> + }
This comment explains exactly what the code does, which is also obvious
from reading the code. A meaningful comment would be explaining why the
state can change 5us later.
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