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Message-ID:
 <BYAPR14MB291865D8A5763CFA9552774FE34A9@BYAPR14MB2918.namprd14.prod.outlook.com>
Date: Mon, 29 May 2023 17:23:12 +0000
From: Michal Smulski <michal.smulski@...a.com>
To: Andrew Lunn <andrew@...n.ch>, Marek Behún
	<marek.behun@....cz>
CC: "f.fainelli@...il.com" <f.fainelli@...il.com>, "olteanv@...il.com"
	<olteanv@...il.com>, "netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: RE: [PATCH net-next v2] net: dsa: mv88e6xxx: implement USXGMII mode
 for mv88e6393x


If I understand this correctly, you are asking to create a function for USXGMII similar to:

static int mv88e6390_serdes_pcs_get_state_sgmii(struct mv88e6xxx_chip *chip,
	int port, int lane, struct phylink_link_state *state)

However, the datasheet for 88e6393x chips does not document any registers for USXGMII interface (as it does for SGMII). You can only see that 10G link is valid by looking at MV88E6390_10G_STAT1 & MDIO_STAT1_LSTATUS which has already been implemented in:
static int mv88e6390_serdes_pcs_get_state_10g(struct mv88e6xxx_chip *chip,
	int port, int lane, struct phylink_link_state *state)
The datasheet states that in USXGMII mode the link is always set to 10GBASE-R coding for all data rates.

>From the logs, I see that that the link is configured using in-band information. However, there is no register access in MV88E6393x that would allow to either control or get status information (speed, duplex, flow control, auto-negotiation, etc). Most of "useful" registers are already defined in mv88e6xxx/serdes.h file.

[   50.624175] mv88e6085 0x0000000008b96000:02: configuring for inband/usxgmii link mode
...
[  387.116463] fsl_dpaa2_eth dpni.3 eth1: configuring for inband/usxgmii link mode
[  387.132554] fsl_dpaa2_eth dpni.3 eth1: Link is Up - 10Gbps/Full - flow control off

If I misunderstood what is requested, please give me a bit more information what I should be adding for this patch to be accepted.

Regards,
Michal

-----Original Message-----
From: Andrew Lunn <andrew@...n.ch> 
Sent: Monday, May 29, 2023 8:11 AM
To: Marek Behún <marek.behun@....cz>
Cc: Michal Smulski <msmulski2@...il.com>; f.fainelli@...il.com; olteanv@...il.com; netdev@...r.kernel.org; Michal Smulski <michal.smulski@...a.com>
Subject: Re: [PATCH net-next v2] net: dsa: mv88e6xxx: implement USXGMII mode for mv88e6393x

CAUTION: This email is originated from outside of the organization. Do not click links or open attachments unless you recognize the sender and know the content is safe.


On Sun, May 28, 2023 at 11:25:22AM +0200, Marek Behún wrote:
> You need also to implement serdes_pcs_get_state for USXGMII.
>
> Preferably by adding USXGMII relevant register constants into 
> include/uapi/linux/mii.h, and using them to parse state register.

And if a standard is being followed here, please try to make the code as helpers, so other USXGMII implementations can use them.

Thanks

        Andrew

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