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Message-Id: <20230530083713.2527380-4-o.rempel@pengutronix.de>
Date: Tue, 30 May 2023 10:37:13 +0200
From: Oleksij Rempel <o.rempel@...gutronix.de>
To: Maxime Coquelin <mcoquelin.stm32@...il.com>,
	Alexandre Torgue <alexandre.torgue@...s.st.com>,
	Rob Herring <robh+dt@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Jérôme Pouiller <jerome.pouiller@...abs.com>
Cc: Oleksij Rempel <o.rempel@...gutronix.de>,
	kernel@...gutronix.de,
	linux-kernel@...r.kernel.org,
	linux-stm32@...md-mailman.stormreply.com,
	linux-arm-kernel@...ts.infradead.org,
	devicetree@...r.kernel.org,
	netdev@...r.kernel.org
Subject: [PATCH v2 3/3] ARM: dts: stm32: prtt1c: Add PoDL PSE regulator nodes

This commit introduces Power over Data Line (PoDL) Power Source
Equipment (PSE) regulator nodes to the PRTT1C devicetree. The addition
of these nodes enables support for PoDL in PRTT1C devices, allowing
power delivery and data transmission over a single twisted pair.

The new PoDL PSE regulator nodes provide voltage capability information
of the current board design, which can be used as a hint for system
administrators when configuring and managing power settings. This update
enhances the versatility and simplifies the power management of PRTT1C
devices while ensuring compatibility with connected Powered Devices
(PDs).

After applying this patch, the power delivery can be controlled from
user space with a patched [1] ethtool version using the following commands:
  ethtool --set-pse t1l2 podl-pse-admin-control enable
to enable power delivery, and
  ethtool --show-pse t1l2
to display the PoDL PSE settings.

By integrating PoDL PSE support into the PRTT1C devicetree, users can
benefit from streamlined power and data connections in their
deployments, improving overall system efficiency and reducing cabling
complexity.

[1] https://lore.kernel.org/all/20230317093024.1051999-1-o.rempel@pengutronix.de/

Signed-off-by: Oleksij Rempel <o.rempel@...gutronix.de>
---
 arch/arm/boot/dts/stm32mp151a-prtt1c.dts | 32 ++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp151a-prtt1c.dts b/arch/arm/boot/dts/stm32mp151a-prtt1c.dts
index 58bb05a8c685..ca0d3329cfd7 100644
--- a/arch/arm/boot/dts/stm32mp151a-prtt1c.dts
+++ b/arch/arm/boot/dts/stm32mp151a-prtt1c.dts
@@ -23,6 +23,18 @@ clock_sja1105: clock-sja1105 {
 		clock-frequency = <25000000>;
 	};
 
+	pse_t1l1: ethernet-pse-1 {
+		compatible = "podl-pse-regulator";
+		pse-supply = <&reg_t1l1>;
+		#pse-cells = <0>;
+	};
+
+	pse_t1l2: ethernet-pse-2 {
+		compatible = "podl-pse-regulator";
+		pse-supply = <&reg_t1l2>;
+		#pse-cells = <0>;
+	};
+
 	mdio0: mdio {
 		compatible = "virtual,mdio-gpio";
 		#address-cells = <1>;
@@ -32,6 +44,24 @@ mdio0: mdio {
 
 	};
 
+	reg_t1l1: regulator-pse-t1l1 {
+		compatible = "regulator-fixed";
+		regulator-name = "pse-t1l1";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		gpio = <&gpiog 13 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	reg_t1l2: regulator-pse-t1l2 {
+		compatible = "regulator-fixed";
+		regulator-name = "pse-t1l2";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		gpio = <&gpiog 14 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
 	wifi_pwrseq: wifi-pwrseq {
 		compatible = "mmc-pwrseq-simple";
 		reset-gpios = <&gpiod 8 GPIO_ACTIVE_LOW>;
@@ -92,6 +122,7 @@ t1l1_phy: ethernet-phy@7 {
 		reset-gpios = <&gpiog 12 GPIO_ACTIVE_LOW>;
 		reset-assert-us = <10>;
 		reset-deassert-us = <35>;
+		pses = <&pse_t1l1>;
 	};
 
 	/* TI DP83TD510E */
@@ -102,6 +133,7 @@ t1l2_phy: ethernet-phy@10 {
 		reset-gpios = <&gpiog 11 GPIO_ACTIVE_LOW>;
 		reset-assert-us = <10>;
 		reset-deassert-us = <35>;
+		pses = <&pse_t1l2>;
 	};
 
 	/* Micrel KSZ9031 */
-- 
2.39.2


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