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Message-ID: <CAPhsuW4pDkd7rCWRM6938ve36rfhGxyu=8t1-GjcKnNajofpQA@mail.gmail.com>
Date: Mon, 26 Jun 2023 10:48:37 -0700
From: Song Liu <song@...nel.org>
To: Mark Rutland <mark.rutland@....com>
Cc: Mike Rapoport <rppt@...nel.org>, Andy Lutomirski <luto@...nel.org>, Kees Cook <keescook@...omium.org>, 
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>, Andrew Morton <akpm@...ux-foundation.org>, 
	Catalin Marinas <catalin.marinas@....com>, Christophe Leroy <christophe.leroy@...roup.eu>, 
	"David S. Miller" <davem@...emloft.net>, Dinh Nguyen <dinguyen@...nel.org>, 
	Heiko Carstens <hca@...ux.ibm.com>, Helge Deller <deller@....de>, Huacai Chen <chenhuacai@...nel.org>, 
	Kent Overstreet <kent.overstreet@...ux.dev>, Luis Chamberlain <mcgrof@...nel.org>, 
	Michael Ellerman <mpe@...erman.id.au>, Nadav Amit <nadav.amit@...il.com>, 
	"Naveen N. Rao" <naveen.n.rao@...ux.ibm.com>, Palmer Dabbelt <palmer@...belt.com>, 
	Puranjay Mohan <puranjay12@...il.com>, Rick P Edgecombe <rick.p.edgecombe@...el.com>, 
	"Russell King (Oracle)" <linux@...linux.org.uk>, Steven Rostedt <rostedt@...dmis.org>, 
	Thomas Bogendoerfer <tsbogend@...ha.franken.de>, Thomas Gleixner <tglx@...utronix.de>, 
	Will Deacon <will@...nel.org>, bpf@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
	linux-mips@...r.kernel.org, linux-mm@...ck.org, linux-modules@...r.kernel.org, 
	linux-parisc@...r.kernel.org, linux-riscv@...ts.infradead.org, 
	linux-s390@...r.kernel.org, linux-trace-kernel@...r.kernel.org, 
	linuxppc-dev@...ts.ozlabs.org, loongarch@...ts.linux.dev, 
	netdev@...r.kernel.org, sparclinux@...r.kernel.org, 
	"the arch/x86 maintainers" <x86@...nel.org>
Subject: Re: [PATCH v2 02/12] mm: introduce execmem_text_alloc() and jit_text_alloc()

On Mon, Jun 26, 2023 at 5:31 AM Mark Rutland <mark.rutland@....com> wrote:
>
[...]
> >
> > So the idea was that jit_text_alloc() will have a cache of large pages
> > mapped ROX, will allocate memory from those caches and there will be
> > jit_update() that uses text poking for writing to that memory.
> >
> > Upon allocation of a large page to increase the cache, that large page will
> > be "invalidated" by filling it with breakpoint instructions (e.g int3 on
> > x86)
>
> Does that work on x86?
>
> That is in no way gauranteed for other architectures; on arm64 you need
> explicit cache maintenance (with I-cache maintenance at the VA to be executed
> from) followed by context-synchronization-events (e.g. via ISB instructions, or
> IPIs).

I guess we need:
1) Invalidate unused part of the huge ROX pages;
2) Do not put two jit users (including module text, bpf, etc.) in the
same cache line;
3) Explicit cache maintenance;
4) context-synchronization-events.

Would these (or a subset of them) be sufficient to protect us from torn read?

Thanks,
Song

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