netdev - Re: [PATCH net] net: phy: marvell10g: fix 88x3310 power up

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Message-ID: <ZLeeZMU4HeiHthQ2@shell.armlinux.org.uk>
Date: Wed, 19 Jul 2023 09:27:16 +0100
From: "Russell King (Oracle)" <linux@...linux.org.uk>
To: Jiawen Wu <jiawenwu@...stnetic.com>
Cc: 'Simon Horman' <simon.horman@...igine.com>, kabel@...nel.org,
	andrew@...n.ch, hkallweit1@...il.com, davem@...emloft.net,
	edumazet@...gle.com, kuba@...nel.org, pabeni@...hat.com,
	netdev@...r.kernel.org
Subject: Re: [PATCH net] net: phy: marvell10g: fix 88x3310 power up

On Wed, Jul 19, 2023 at 03:57:30PM +0800, Jiawen Wu wrote:
> > According to this read though (which is in get_mactype), the write
> > didn't take effect.
> > 
> > If you place a delay of 1ms after phy_clear_bits_mmd() in
> > mv3310_power_up(), does it then work?
> 
> Yes, I just experimented, it works well.

Please send a patch adding it, with a comment along the lines of:

	/* Sometimes, the power down bit doesn't clear immediately, and
	 * a read of this register causes the bit not to clear. Delay
	 * 1ms to allow the PHY to come out of power down mode before
	 * the next access.
	 */

Thanks.

-- 
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