netdev - Re: [PATCH net-next] net: dsa: realtek: add phylink_get

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Message-Id: 
 <169252856777.3170.269285332063521836.git-patchwork-notify@kernel.org>
Date: Sun, 20 Aug 2023 10:49:27 +0000
From: patchwork-bot+netdevbpf@...nel.org
To: Russell King (Oracle) <rmk+kernel@...linux.org.uk>
Cc: andrew@...n.ch, hkallweit1@...il.com, linus.walleij@...aro.org,
 alsi@...g-olufsen.dk, f.fainelli@...il.com, olteanv@...il.com,
 davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org, pabeni@...hat.com,
 netdev@...r.kernel.org
Subject: Re: [PATCH net-next] net: dsa: realtek: add phylink_get_caps
 implementation

Hello:

This patch was applied to netdev/net-next.git (main)
by David S. Miller <davem@...emloft.net>:

On Sat, 19 Aug 2023 12:11:06 +0100 you wrote:
> The user ports use RSGMII, but we don't have that, and DT doesn't
> specify a phy interface mode, so phylib defaults to GMII. These support
> 1G, 100M and 10M with flow control. It is unknown whether asymetric
> pause is supported at all speeds.
> 
> The CPU port uses MII/GMII/RGMII/REVMII by hardware pin strapping,
> and support speeds specific to each, with full duplex only supported
> in some modes. Flow control may be supported again by hardware pin
> strapping, and theoretically is readable through a register but no
> information is given in the datasheet for that.
> 
> [...]

Here is the summary with links:
  - [net-next] net: dsa: realtek: add phylink_get_caps implementation
    https://git.kernel.org/netdev/net-next/c/b22eef6864ca

You are awesome, thank you!
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