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Message-ID: <790ead1e-7b15-4f88-bdf9-738b24531ef0@linaro.org>
Date: Mon, 28 Aug 2023 14:35:49 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Devi Priya <quic_devipriy@...cinc.com>, andersson@...nel.org,
 agross@...nel.org, mturquette@...libre.com, sboyd@...nel.org,
 robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
 catalin.marinas@....com, will@...nel.org, p.zabel@...gutronix.de,
 richardcochran@...il.com, arnd@...db.de, geert+renesas@...der.be,
 nfraprado@...labora.com, rafal@...ecki.pl, peng.fan@....com,
 linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, netdev@...r.kernel.org
Cc: quic_saahtoma@...cinc.com
Subject: Re: [PATCH V2 5/7] clk: qcom: Add NSS clock Controller driver for
 IPQ9574

On 25.08.2023 11:12, Devi Priya wrote:
> Add Networking Sub System Clock Controller(NSSCC) driver for ipq9574 based
> devices.
> 
> Signed-off-by: Devi Priya <quic_devipriy@...cinc.com>
> ---
[...]

> +	[UBI3_CLKRST_CLAMP_ENABLE] = { 0x28A04, 9 },
Please make all hex lowercase.

[...]

> +	[PPE_FULL_RESET] = { 0x28A08, 0, 1, 0x1E0000 },
{ .reg = 0x28a08, .bitmask = GENMASK(foo,bar) },

[...]

> +	ret = devm_pm_runtime_enable(&pdev->dev);
> +	if (ret < 0)
> +		return ret;
> +
> +	ret = devm_pm_clk_create(&pdev->dev);
> +	if (ret < 0)
> +		return ret;
> +
> +	ret = of_pm_clk_add_clk(&pdev->dev, "nssnoc_nsscc");
> +	if (ret < 0) {
> +		dev_err(&pdev->dev, "Failed to acquire nssnoc_nsscc clock\n");
> +		return ret;
dev_err_probe, everywhere?

Konrad

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