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Message-ID: <81d7b86e-aee2-4222-8c7a-52d0b710a2f2@linaro.org>
Date: Mon, 23 Oct 2023 19:37:30 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Romain Gantois <romain.gantois@...tlin.com>, davem@...emloft.net,
 Rob Herring <robh+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc: Jakub Kicinski <kuba@...nel.org>, Eric Dumazet <edumazet@...gle.com>,
 Paolo Abeni <pabeni@...hat.com>, netdev@...r.kernel.org,
 linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
 thomas.petazzoni@...tlin.com, Andrew Lunn <andrew@...n.ch>,
 Florian Fainelli <f.fainelli@...il.com>,
 Heiner Kallweit <hkallweit1@...il.com>, Russell King
 <linux@...linux.org.uk>, linux-arm-kernel@...ts.infradead.org,
 Vladimir Oltean <vladimir.oltean@....com>,
 Luka Perkov <luka.perkov@...tura.hr>, Robert Marko
 <robert.marko@...tura.hr>, Andy Gross <agross@...nel.org>,
 Bjorn Andersson <andersson@...nel.org>,
 Konrad Dybcio <konrad.dybcio@...ainline.org>,
 Maxime Chevallier <maxime.chevallier@...tlin.com>
Subject: Re: [PATCH net-next 1/5] net: dt-bindings: Introduce the Qualcomm
 IPQESS Ethernet switch

On 23/10/2023 17:50, Romain Gantois wrote:
> Add the DT binding for the IPQESS Ethernet switch subsystem, that
> integrates a modified QCA8K switch and an EDMA MAC controller. It inherits
> from a basic ethernet switch binding and adds three regmaps, a phandle and
> reset line for the PSGMII, a phandle to the MDIO bus, a clock, and 32
> interrupts.
> 
> Signed-off-by: Romain Gantois <romain.gantois@...tlin.com>
> ---
>  .../bindings/net/qcom,ipq4019-ess.yaml        | 152 ++++++++++++++++++
>  1 file changed, 152 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/net/qcom,ipq4019-ess.yaml
> 
> diff --git a/Documentation/devicetree/bindings/net/qcom,ipq4019-ess.yaml b/Documentation/devicetree/bindings/net/qcom,ipq4019-ess.yaml
> new file mode 100644
> index 000000000000..9bb6b010ea6a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/qcom,ipq4019-ess.yaml
> @@ -0,0 +1,152 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/qcom,ipq4019-ess.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm IPQ4019 Ethernet switch subsystem driver

Bindings should be about hardware. Please drop "driver". "Subsystem"
also sounds like Linuxism.

> +
> +maintainers:
> +  - Romain Gantois <romain.gantois@...tlin.com>
> +
> +$ref: ethernet-switch.yaml#
> +
> +properties:
> +  compatible:
> +    const: qca,ipq4019-qca8337n


What do you want to express here? ipq4019 is not qca. This is Qualcomm
(so qcom) SoC.

> +
> +  reg:
> +    maxItems: 3
> +    description: Base ESS registers, PSGMII registers and EDMA registers

You need to describe the items, so:
items:
 - description: foo
 - description: foo
 - description: foo

> +
> +  reg-names:
> +    maxItems: 3

You need to list items instead.

> +
> +  resets:
> +    maxItems: 2
> +    description: Handles to the PSGMII and ESS reset lines

You need to list items instead.

> +
> +  reset-names:
> +    maxItems: 2

You need to list items instead.


> +
> +  clocks:
> +    maxItems: 1
> +    description: Handle to the GCC ESS clock
> +
> +  clock-names:
> +    maxItems: 1

Drop clock-names, useless for one entry.

> +
> +  psgmii-ethphy:
> +    maxItems: 1
> +    description: Handle to the MDIO bus node corresponding to the PSGMII

That's a bit odd property. Where is it defined?

> +
> +  mdio:
> +    maxItems: 1
> +    description: Handle to the IPQ4019 MDIO Controller
> +
> +  interrupts:
> +    maxItems: 32
> +    description: One interrupt per tx and rx queue, the first 16 are rx queues
> +                 and the last 16 are the tx queues
> +
> +required:
> +  - compatible
> +  - reg
> +  - reg-names
> +  - resets
> +  - reset-names
> +  - clocks
> +  - clock-names
> +  - mdio
> +  - interrupts
> +
> +unevaluatedProperties: false


Best regards,
Krzysztof


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