netdev - Re: [PATCH v6 3/6] net: phy: at803x: add QCA8084 ethernet phy support

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Date: Tue, 28 Nov 2023 10:35:00 +0000
From: "Russell King (Oracle)" <linux@...linux.org.uk>
To: Jie Luo <quic_luoj@...cinc.com>
Cc: Andrew Lunn <andrew@...n.ch>, davem@...emloft.net, edumazet@...gle.com,
	kuba@...nel.org, pabeni@...hat.com, robh+dt@...nel.org,
	krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
	hkallweit1@...il.com, corbet@....net, netdev@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-doc@...r.kernel.org
Subject: Re: [PATCH v6 3/6] net: phy: at803x: add QCA8084 ethernet phy support

On Tue, Nov 28, 2023 at 05:50:41PM +0800, Jie Luo wrote:
> 
> 
> On 11/28/2023 5:00 PM, Russell King (Oracle) wrote:
> > On Tue, Nov 28, 2023 at 03:16:45PM +0800, Jie Luo wrote:
> > > > > The interface mode is passed in the .config_init, which is configured
> > > > > by the PCS driver, the hardware register is located in the PCS, this
> > > > > driver will be pushed later.
> > > > 
> > > > Is this the same as how the syqca807x works? Can the PCS driver be
> > > > shared by these two drivers?
> > > 
> > > I am not sure syqca807x, would you point me the code path of this driver?
> > > 
> > > > 
> > > > What i don't like at the moment is that we have two driver
> > > > developments going on at once for hardware which seems very similar,
> > > > but no apparent cooperation?
> > > > 
> > > > 	Andrew
> > > 
> > > The PCS of qca8084 is the PHY PCS, which should be new PCS driver,
> > > in the previous chips, we don't have this kind of PHY PCS.
> > 
> > No. PCS drivers are for MAC-side PCS drivers, not PHY-side PCS drivers.
> > 
> >                       +-------------
> > 		     |     PHY
> > MAC---PCS --- link --- PCS --- ...
> >         ^             |  ^
> >         |	     +--|----------
> >    For this PCS          |
> >                    Not for this PCS
> > 
> 
> The PCS drivers in drivers/net/pcs/ should be in PHY side, such as
> pcs-lynx.c and pcs-xpcs.c, they are configuring the MDIO device
> registers.

Wrong. No they are not. Just because they are accessed via MDIO does
not mean they are in the PHY. MDIO can be used for more than just the
PHY, and is on a lot of platforms.

LX2160A for example has many MDIO buses, and the PCSes (of which there
are multiple inside the chip, and use pcs-lynx) are accessed through
the MDIO bus specific to each port. They are not MMIO mapped.

The same is true on stmmac platforms, where xpcs is used - xpcs is the
_MAC_ side PCS.

Sorry but you are wrong.

-- 
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