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Message-ID: <2c8b044f-dc17-4f71-89bb-7d50d02bb4cc@collabora.com>
Date: Tue, 28 Nov 2023 02:46:27 +0200
From: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
To: Emil Renner Berthing <emil.renner.berthing@...onical.com>,
"David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, Emil Renner Berthing <kernel@...il.dk>,
Samin Guo <samin.guo@...rfivetech.com>,
Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt
<palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Jose Abreu <joabreu@...opsys.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Richard Cochran <richardcochran@...il.com>,
Giuseppe Cavallaro <peppe.cavallaro@...com>
Cc: netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org, kernel@...labora.com
Subject: Re: [PATCH v2 09/12] riscv: dts: starfive: jh7100: Add sysmain and
gmac DT nodes
On 11/26/23 23:15, Emil Renner Berthing wrote:
> Cristian Ciocaltea wrote:
>> Provide the sysmain and gmac DT nodes supporting the DWMAC found on the
>> StarFive JH7100 SoC.
>>
>> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
>> ---
>> arch/riscv/boot/dts/starfive/jh7100.dtsi | 36 ++++++++++++++++++++++++
>> 1 file changed, 36 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi
>> index a8a5bb00b0d8..e8228e96d350 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi
>> @@ -179,6 +179,37 @@ plic: interrupt-controller@...0000 {
>> riscv,ndev = <133>;
>> };
>>
>> + gmac: ethernet@...20000 {
>> + compatible = "starfive,jh7100-dwmac", "snps,dwmac";
>> + reg = <0x0 0x10020000 0x0 0x10000>;
>> + clocks = <&clkgen JH7100_CLK_GMAC_ROOT_DIV>,
>> + <&clkgen JH7100_CLK_GMAC_AHB>,
>> + <&clkgen JH7100_CLK_GMAC_PTP_REF>,
>> + <&clkgen JH7100_CLK_GMAC_TX_INV>,
>> + <&clkgen JH7100_CLK_GMAC_GTX>;
>> + clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "gtx";
>> + resets = <&rstgen JH7100_RSTN_GMAC_AHB>;
>> + reset-names = "ahb";
>> + interrupts = <6>, <7>;
>> + interrupt-names = "macirq", "eth_wake_irq";
>> + max-frame-size = <9000>;
>> + snps,multicast-filter-bins = <32>;
>> + snps,perfect-filter-entries = <128>;
>> + starfive,syscon = <&sysmain 0x70 0>;
>> + rx-fifo-depth = <32768>;
>> + tx-fifo-depth = <16384>;
>> + snps,axi-config = <&stmmac_axi_setup>;
>> + snps,fixed-burst;
>> + snps,force_thresh_dma_mode;
>> + status = "disabled";
>> +
>> + stmmac_axi_setup: stmmac-axi-config {
>> + snps,wr_osr_lmt = <0xf>;
>> + snps,rd_osr_lmt = <0xf>;
>
> As I also noted on the JH7110 patches these are not addresses or offsets but
> limits eg. counting things, which makes a lot more sense in decimal for most
> humans. But here you've changed them back to 0xf, why?
That's a left over from v1. Will fix, thanks!
>> + snps,blen = <256 128 64 32 0 0 0>;
>> + };
>> + };
>> +
>> clkgen: clock-controller@...00000 {
>> compatible = "starfive,jh7100-clkgen";
>> reg = <0x0 0x11800000 0x0 0x10000>;
>> @@ -193,6 +224,11 @@ rstgen: reset-controller@...40000 {
>> #reset-cells = <1>;
>> };
>>
>> + sysmain: syscon@...50000 {
>> + compatible = "starfive,jh7100-sysmain", "syscon";
>> + reg = <0x0 0x11850000 0x0 0x10000>;
>> + };
>> +
>> i2c0: i2c@...b0000 {
>> compatible = "snps,designware-i2c";
>> reg = <0x0 0x118b0000 0x0 0x10000>;
>> --
>> 2.42.0
>>
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