netdev - Re: [PATCH v3 6/9] riscv: dts: starfive: visionfive-v1: Setup ethernet phy

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <f8f9d454-6155-4b1c-b4b2-daf98267be14@lunn.ch>
Date: Sun, 17 Dec 2023 18:55:10 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
Cc: "David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Rob Herring <robh+dt@...nel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Emil Renner Berthing <kernel@...il.dk>,
	Samin Guo <samin.guo@...rfivetech.com>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>,
	Hal Feng <hal.feng@...rfivetech.com>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>,
	Alexandre Torgue <alexandre.torgue@...s.st.com>,
	Jose Abreu <joabreu@...opsys.com>,
	Maxime Coquelin <mcoquelin.stm32@...il.com>,
	Richard Cochran <richardcochran@...il.com>,
	Giuseppe Cavallaro <peppe.cavallaro@...com>, netdev@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-riscv@...ts.infradead.org, linux-clk@...r.kernel.org,
	linux-stm32@...md-mailman.stormreply.com,
	linux-arm-kernel@...ts.infradead.org, kernel@...labora.com,
	Emil Renner Berthing <emil.renner.berthing@...onical.com>
Subject: Re: [PATCH v3 6/9] riscv: dts: starfive: visionfive-v1: Setup
 ethernet phy

On Fri, Dec 15, 2023 at 10:40:45PM +0200, Cristian Ciocaltea wrote:
> The StarFive VisionFive V1 SBC uses a Motorcomm YT8521 PHY supporting
> RGMII-ID, but requires manual adjustment of the RX internal delay to
> work properly.
> 
> The default RX delay provided by the driver is 1.95 ns, which proves to
> be too high. Applying a 50% reduction seems to mitigate the issue.
> 
> Also note this adjustment is not necessary on BeagleV Starlight SBC,
> which uses a Microchip PHY.  Hence, there is no indication of a
> miss-behaviour on the GMAC side, but most likely the issue stems from
> the Motorcomm PHY.

I suggest you make a similar comment in the .dts file, just to explain
the odd setting.

	Andrew