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Message-ID: <CAJM55Z-+2RY+owdd9YJM_CihKqDtAgykSDZN0tLZAGRTRGQhBA@mail.gmail.com>
Date: Wed, 20 Dec 2023 05:48:24 -0800
From: Emil Renner Berthing <emil.renner.berthing@...onical.com>
To: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>,
Emil Renner Berthing <kernel@...il.dk>, Conor Dooley <conor@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>, Richard Cochran <richardcochran@...il.com>,
Andrew Lunn <andrew@...n.ch>, Jacob Keller <jacob.e.keller@...el.com>
Cc: linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, netdev@...r.kernel.org, kernel@...labora.com,
Emil Renner Berthing <emil.renner.berthing@...onical.com>
Subject: Re: [PATCH v5 4/4] riscv: dts: starfive: beaglev-starlight: Setup phy
reset gpio
Cristian Ciocaltea wrote:
> The BeagleV Starlight SBC uses a Microchip KSZ9031RNXCA PHY supporting
> RGMII-ID which doesn't require any particular setup, other than defining
> a reset gpio, as opposed to VisionFive V1 for which the RX internal
> delay had to be adjusted.
>
> Co-developed-by: Emil Renner Berthing <emil.renner.berthing@...onical.com>
> Signed-off-by: Emil Renner Berthing <emil.renner.berthing@...onical.com>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
> Reviewed-by: Jacob Keller <jacob.e.keller@...el.com>
> ---
> .../boot/dts/starfive/jh7100-beaglev-starlight.dts | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts b/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts
> index 7cda3a89020a..b79426935bfd 100644
> --- a/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts
> +++ b/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts
> @@ -11,3 +11,14 @@ / {
> model = "BeagleV Starlight Beta";
> compatible = "beagle,beaglev-starlight-jh7100-r0", "starfive,jh7100";
> };
> +
> +&mdio {
> + phy: ethernet-phy@7 {
> + reg = <7>;
> + reset-gpios = <&gpio 63 GPIO_ACTIVE_LOW>;
> + };
> +};
> +
> +&gmac {
> + phy-handle = <&phy>;
> +};
..and here.
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