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Message-ID: <3b2d41cd-4c0a-4277-8650-e6da37139023@collabora.com>
Date: Wed, 20 Dec 2023 16:38:57 +0200
From: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
To: Emil Renner Berthing <emil.renner.berthing@...onical.com>,
Emil Renner Berthing <kernel@...il.dk>, Conor Dooley <conor@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt
<palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
Richard Cochran <richardcochran@...il.com>, Andrew Lunn <andrew@...n.ch>,
Jacob Keller <jacob.e.keller@...el.com>
Cc: linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, netdev@...r.kernel.org, kernel@...labora.com
Subject: Re: [PATCH v5 1/4] riscv: dts: starfive: jh7100: Add sysmain and gmac
DT nodes
On 12/20/23 15:43, Emil Renner Berthing wrote:
> Cristian Ciocaltea wrote:
>> Provide the sysmain and gmac DT nodes supporting the DWMAC found on the
>> StarFive JH7100 SoC.
>>
>> Co-developed-by: Emil Renner Berthing <emil.renner.berthing@...onical.com>
>> Signed-off-by: Emil Renner Berthing <emil.renner.berthing@...onical.com>
>> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
>> Reviewed-by: Jacob Keller <jacob.e.keller@...el.com>
>> ---
>> arch/riscv/boot/dts/starfive/jh7100.dtsi | 36 ++++++++++++++++++++++++
>> 1 file changed, 36 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi
>> index c216aaecac53..2ebdebe6a81c 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi
>> @@ -204,6 +204,37 @@ sdio1: mmc@...10000 {
>> status = "disabled";
>> };
>>
>> + gmac: ethernet@...20000 {
>> + compatible = "starfive,jh7100-dwmac", "snps,dwmac";
>> + reg = <0x0 0x10020000 0x0 0x10000>;
>> + clocks = <&clkgen JH7100_CLK_GMAC_ROOT_DIV>,
>> + <&clkgen JH7100_CLK_GMAC_AHB>,
>> + <&clkgen JH7100_CLK_GMAC_PTP_REF>,
>> + <&clkgen JH7100_CLK_GMAC_TX_INV>,
>> + <&clkgen JH7100_CLK_GMAC_GTX>;
>> + clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "gtx";
>> + resets = <&rstgen JH7100_RSTN_GMAC_AHB>;
>> + reset-names = "ahb";
>> + interrupts = <6>, <7>;
>> + interrupt-names = "macirq", "eth_wake_irq";
>> + max-frame-size = <9000>;
>> + snps,multicast-filter-bins = <32>;
>> + snps,perfect-filter-entries = <128>;
>> + starfive,syscon = <&sysmain 0x70 0>;
>> + rx-fifo-depth = <32768>;
>> + tx-fifo-depth = <16384>;
>> + snps,axi-config = <&stmmac_axi_setup>;
>> + snps,fixed-burst;
>> + snps,force_thresh_dma_mode;
>
> Compared to v4 you're missing a
>
> snps,no-pbl-x8;
>
> here. It might be the right thing to do, but then I would have expected
> it to me mentioned in the cover letter version history.
Oh yes, I missed to add this to the changelog, sorry! I dropped that
because the property is only valid for snps,dwmac-{3.50a, 4.10a, 4.20a,
5.20} compatibles, while we have plain snps,dwmac to handle 3.7x.
We could have probably used snps,dwmac-3.70a or snps,dwmac-3.710, but
I'm not sure which is the exact chip revision and it wouldn't really
change anything as there is no special handling for them in the
snps,dwmac.yaml binding.
>> + status = "disabled";
>> +
>> + stmmac_axi_setup: stmmac-axi-config {
>> + snps,wr_osr_lmt = <16>;
>> + snps,rd_osr_lmt = <16>;
>> + snps,blen = <256 128 64 32 0 0 0>;
>> + };
>> + };
>> +
>> clkgen: clock-controller@...00000 {
>> compatible = "starfive,jh7100-clkgen";
>> reg = <0x0 0x11800000 0x0 0x10000>;
>> @@ -218,6 +249,11 @@ rstgen: reset-controller@...40000 {
>> #reset-cells = <1>;
>> };
>>
>> + sysmain: syscon@...50000 {
>> + compatible = "starfive,jh7100-sysmain", "syscon";
>> + reg = <0x0 0x11850000 0x0 0x10000>;
>> + };
>> +
>> i2c0: i2c@...b0000 {
>> compatible = "snps,designware-i2c";
>> reg = <0x0 0x118b0000 0x0 0x10000>;
>> --
>> 2.43.0
>>
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