[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <f75e5812-93fe-4744-a160-b5505fecd47d@gmail.com>
Date: Wed, 20 Dec 2023 17:20:07 +0100
From: Heiner Kallweit <hkallweit1@...il.com>
To: Marek Behún <kabel@...nel.org>, netdev@...r.kernel.org,
Andrew Lunn <andrew@...n.ch>, "David S. Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>
Cc: Russell King <rmk+kernel@...linux.org.uk>,
Alexander Couzens <lynxis@...0.eu>, Daniel Golle <daniel@...rotopia.org>,
Willy Liu <willy.liu@...ltek.com>, Ioana Ciornei <ioana.ciornei@....com>,
Marek Mojík <marek.mojik@....cz>,
Maximilián Maliar <maximilian.maliar@....cz>
Subject: Re: [PATCH net-next 00/15] Realtek RTL822x PHY rework to c45 and
SerDes interface switching
On 20.12.2023 16:55, Marek Behún wrote:
> Hi,
>
> this series reworks the realtek PHY driver's support for rtl822x
> 2.5G transceivers:
>
> - First I change the driver so that the high level driver methods
> only use clause 45 register accesses (the only clause 22 accesses
> are left when accessing c45 registers indirectly, if the MDIO bus
> does not support clause 45 accesses).
> The driver starts using the genphy_c45_* methods.
>
> At this point the driver is ready to be used on a MDIO bus capable
> of only clause 45 accesses, but will still work on clause 22 only
> MDIO bus.
>
> - I then add support for SerDes mode switching between 2500base-x
> and sgmii, based on autonegotiated copper speed.
>
> All this is done so that we can support another 2.5G copper SFP
> module, which is enabled by the last patch.
>
Has been verified that the RTL8125-integrated PHY's still work
properly with this patch set?
Powered by blists - more mailing lists