netdev - [PATCH 5/6] arm64: dts: qcom: ipq5332: Add RDP441 board device tree

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Date: Wed, 10 Jan 2024 19:20:58 +0800
From: Luo Jie <quic_luoj@...cinc.com>
To: <andersson@...nel.org>, <konrad.dybcio@...aro.org>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>
CC: <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <netdev@...r.kernel.org>,
        <quic_kkumarcs@...cinc.com>, <quic_suruchia@...cinc.com>,
        <quic_soni@...cinc.com>, <quic_pavir@...cinc.com>,
        <quic_souravp@...cinc.com>, <quic_linchen@...cinc.com>,
        <quic_leiwei@...cinc.com>
Subject: [PATCH 5/6] arm64: dts: qcom: ipq5332: Add RDP441 board device tree

From: Lei Wei <quic_leiwei@...cinc.com>

RDP441 board has onboard QCA8386 switch and 10G SFP port.

Signed-off-by: Lei Wei <quic_leiwei@...cinc.com>
Signed-off-by: Luo Jie <quic_luoj@...cinc.com>
---
 arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts | 51 +++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts b/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts
index 846413817e9a..d51968e9d601 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts
@@ -12,6 +12,15 @@
 / {
 	model = "Qualcomm Technologies, Inc. IPQ5332 MI01.2";
 	compatible = "qcom,ipq5332-ap-mi01.2", "qcom,ipq5332";
+
+	soc@0 {
+		sfp1: sfp-1 {
+			compatible = "sff,sfp";
+			i2c-bus = <&blsp1_i2c1>;
+			los-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
+			tx-disable-gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>;
+		};
+	};
 };
 
 &blsp1_i2c1 {
@@ -63,3 +72,45 @@ data-pins {
 		};
 	};
 };
+
+&qcom_ppe {
+	qcom,port_phyinfo {
+		ppe_port0: port@0 {
+			port_id = <1>;
+			phy-mode = "2500base-x";
+			fixed-link {
+				speed = <2500>;
+				full-duplex;
+				pause;
+			};
+		};
+
+		ppe_port1: port@1 {
+			port_id = <2>;
+			phy-mode = "10gbase-r";
+			sfp = <&sfp1>;
+			managed = "in-band-status";
+		};
+	};
+};
+
+&mdio {
+	status = "okay";
+	reset-gpios = <&tlmm 51 GPIO_ACTIVE_LOW>;
+
+	phy0: ethernet-phy@0 {
+		      reg = <1>;
+	      };
+
+	phy1: ethernet-phy@1 {
+		      reg = <2>;
+	      };
+
+	phy2: ethernet-phy@2 {
+		      reg = <3>;
+	      };
+
+	phy3: ethernet-phy@3 {
+		      reg = <4>;
+	      };
+};
-- 
2.42.0