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Message-ID: <61973012-3f74-4b58-9575-3bc5199f61d9@lunn.ch>
Date: Thu, 11 Jan 2024 17:30:22 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Jie Luo <quic_luoj@...cinc.com>
Cc: andersson@...nel.org, konrad.dybcio@...aro.org, robh+dt@...nel.org,
	krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
	linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
	quic_kkumarcs@...cinc.com, quic_suruchia@...cinc.com,
	quic_soni@...cinc.com, quic_pavir@...cinc.com,
	quic_souravp@...cinc.com, quic_linchen@...cinc.com,
	quic_leiwei@...cinc.com
Subject: Re: [PATCH 3/6] arm64: dts: qcom: ipq5332: Add MDIO device tree

> Sorry for the confusion, the pin nodes are for the MDIO and MDC, these
> PINs are used by the dedicated hardware MDIO block in the SoC. I will update
> the node name from mux_0 to MDC, mux_1 to MDIO, to make it clear. The driver
> for this node is drivers/net/mdio/mdio-ipq4019.c, it is not related to the
> mdio-mux-* code.

So these is all about pinmux.

When you say:
> PINs are used by the dedicated hardware MDIO block in the SoC

do you actually mean:

PINs are used by the two dedicated hardware MDIO blocks in the SoC.

You have two sets of mdio/mdc configurations here, so i assume there
are two MDIO hardware blocks, each being an MDIO bus master.

    Andrew

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