netdev - Re: [PATCH net-next v3 3/6] net: hisilicon: add support for hisi

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Message-ID: <29fc21f0-0e46-4d0f-8d4b-c4dbd1689c55@lunn.ch>
Date: Mon, 19 Feb 2024 21:03:45 +0100
From: Andrew Lunn <andrew@...n.ch>
To: forbidden405@...look.com
Cc: Yisen Zhuang <yisen.zhuang@...wei.com>,
	Salil Mehta <salil.mehta@...wei.com>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Rob Herring <robh+dt@...nel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Heiner Kallweit <hkallweit1@...il.com>,
	Russell King <linux@...linux.org.uk>, netdev@...r.kernel.org,
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH net-next v3 3/6] net: hisilicon: add support for
 hisi_femac core on Hi3798MV200

> Note it's unable to put the MDIO bus node outside of MAC controller
> (i.e. at the same level in the parent bus node). Because we need to
> control all clocks and resets in FEMAC driver due to the phy reset
> procedure. So the clocks can't be assigned to MDIO bus device, which is
> an essential resource for the MDIO bus to work.

What PHY driver is being used? If there a specific PHY driver for this
hardware? Does it implement soft reset?

I'm wondering if you can skip hardware reset of the PHY and only do a
software reset.

	Andrew