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Message-ID: <20240222133103.GB960874@kernel.org>
Date: Thu, 22 Feb 2024 13:31:03 +0000
From: Simon Horman <horms@...nel.org>
To: Diogo Ivo <diogo.ivo@...mens.com>
Cc: davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
pabeni@...hat.com, danishanwar@...com, rogerq@...nel.org,
vigneshr@...com, arnd@...db.de, wsa+renesas@...g-engineering.com,
vladimir.oltean@....com, andrew@...n.ch, dan.carpenter@...aro.org,
netdev@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
jan.kiszka@...mens.com
Subject: Re: [PATCH net-next v3 10/10] net: ti: icssg-prueth: Add ICSSG
Ethernet driver for AM65x SR1.0 platforms
On Wed, Feb 21, 2024 at 03:24:16PM +0000, Diogo Ivo wrote:
> Add the PRUeth driver for the ICSSG subsystem found in AM65x SR1.0 devices.
> The main differences that set SR1.0 and SR2.0 apart are the missing TXPRU
> core in SR1.0, two extra DMA channels for management purposes and different
> firmware that needs to be configured accordingly.
>
> Based on the work of Roger Quadros, Vignesh Raghavendra and
> Grygorii Strashko in TI's 5.10 SDK [1].
>
> [1]: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/?h=ti-linux-5.10.y
>
> Co-developed-by: Jan Kiszka <jan.kiszka@...mens.com>
> Signed-off-by: Jan Kiszka <jan.kiszka@...mens.com>
> Signed-off-by: Diogo Ivo <diogo.ivo@...mens.com>
...
> diff --git a/drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c b/drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c
...
> +static void icssg_config_sr1(struct prueth *prueth, struct prueth_emac *emac,
> + int slice)
> +{
> + struct icssg_sr1_config config;
> + void __iomem *va;
> + int i, index;
> +
> + memset(&config, 0, sizeof(config));
> + config.addr_lo = cpu_to_le32(lower_32_bits(prueth->msmcram.pa));
> + config.addr_hi = cpu_to_le32(upper_32_bits(prueth->msmcram.pa));
> + config.num_tx_threads = 0;
> + config.rx_flow_id = emac->rx_flow_id_base; /* flow id for host port */
> + config.rx_mgr_flow_id = emac->rx_mgm_flow_id_base; /* for mgm ch */
> + config.rand_seed = get_random_u32();
Hi Diogo and Jan,
The fields of config above are all __le32.
However the last three lines above assign host byte-order values to these
fields. This does not seem correct.
This is flagged by Sparse along with some problems.
Please ensure that new Sparse warnings are not introduced.
> +
> + for (i = PRUETH_EMAC_BUF_POOL_START_SR1; i < PRUETH_NUM_BUF_POOLS_SR1; i++) {
> + index = i - PRUETH_EMAC_BUF_POOL_START_SR1;
> + config.tx_buf_sz[i] = cpu_to_le32(emac_egress_buf_pool_size[index]);
> + }
> +
> + va = prueth->shram.va + slice * ICSSG_CONFIG_OFFSET_SLICE1;
> + memcpy_toio(va, &config, sizeof(config));
> +
> + emac->speed = SPEED_1000;
> + emac->duplex = DUPLEX_FULL;
> +}
> +
> +static int emac_send_command_sr1(struct prueth_emac *emac, u32 cmd)
> +{
> + dma_addr_t desc_dma, buf_dma;
> + struct prueth_tx_chn *tx_chn;
> + struct cppi5_host_desc_t *first_desc;
> + u32 *data = emac->cmd_data;
> + u32 pkt_len = sizeof(emac->cmd_data);
> + void **swdata;
> + int ret = 0;
> + u32 *epib;
In new Networking code please express local variables in reverse xmas tree
order - longest line to shortest.
Something like this (completely untested!):
struct cppi5_host_desc_t *first_desc;
u32 pkt_len = sizeof(emac->cmd_data);
dma_addr_t desc_dma, buf_dma;
struct prueth_tx_chn *tx_chn;
u32 *data = emac->cmd_data;
void **swdata;
int ret = 0;
u32 *epib;
There is also one such problem in Patch 06/10.
These problems can be detected using:
https://github.com/ecree-solarflare/xmastree
...
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