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Message-ID: <7b03fe64-abe0-4a3c-9a23-1dbed465ed37@kernel.org>
Date: Mon, 26 Feb 2024 18:48:23 +0200
From: Roger Quadros <rogerq@...nel.org>
To: Diogo Ivo <diogo.ivo@...mens.com>, danishanwar@...com,
 davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
 pabeni@...hat.com, robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
 conor+dt@...nel.org, linux-arm-kernel@...ts.infradead.org,
 netdev@...r.kernel.org, devicetree@...r.kernel.org
Cc: jan.kiszka@...mens.com
Subject: Re: [PATCH net-next v3 01/10] dt-bindings: net: Add support for AM65x
 SR1.0 in ICSSG



On 21/02/2024 17:24, Diogo Ivo wrote:
> Silicon Revision 1.0 of the AM65x came with a slightly different ICSSG
> support: Only 2 PRUs per slice are available and instead 2 additional
> DMA channels are used for management purposes. We have no restrictions
> on specified PRUs, but the DMA channels need to be adjusted.
> 
> Co-developed-by: Jan Kiszka <jan.kiszka@...mens.com>
> Signed-off-by: Jan Kiszka <jan.kiszka@...mens.com>
> Signed-off-by: Diogo Ivo <diogo.ivo@...mens.com>

Reviewed-by: Roger Quadros <rogerq@...nel.org>

-- 
cheers,
-roger

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