netdev - RE: [PATCH net] net: lan743x: Add set RFE read fifo threshold for PCI1x1x chips

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Message-ID: <LV8PR11MB870091AE0A368C03BC81DDC29F2D2@LV8PR11MB8700.namprd11.prod.outlook.com>
Date: Mon, 18 Mar 2024 06:50:11 +0000
From: <Raju.Lakkaraju@...rochip.com>
To: <horms@...nel.org>
CC: <netdev@...r.kernel.org>, <davem@...emloft.net>, <kuba@...nel.org>,
	<pabeni@...hat.com>, <edumazet@...gle.com>, <linux-kernel@...r.kernel.org>,
	<Bryan.Whitehead@...rochip.com>, <UNGLinuxDriver@...rochip.com>
Subject: RE: [PATCH net] net: lan743x: Add set RFE read fifo threshold for
 PCI1x1x chips

Hi Simon Horman,

Thank you for review comments.

> -----Original Message-----
> From: Simon Horman <horms@...nel.org>
> Sent: Saturday, March 9, 2024 12:58 AM
> To: Raju Lakkaraju - I30499 <Raju.Lakkaraju@...rochip.com>
> Cc: netdev@...r.kernel.org; davem@...emloft.net; kuba@...nel.org;
> pabeni@...hat.com; edumazet@...gle.com; linux-kernel@...r.kernel.org;
> Bryan Whitehead - C21958 <Bryan.Whitehead@...rochip.com>;
> UNGLinuxDriver <UNGLinuxDriver@...rochip.com>
> Subject: Re: [PATCH net] net: lan743x: Add set RFE read fifo threshold for
> PCI1x1x chips
> 
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
> 
> On Thu, Mar 07, 2024 at 02:28:23PM +0530, Raju Lakkaraju wrote:
> > The RFE (Receive Filtering Engine) read fifo threshold hardware
> > default should be overwritten to 3 for PCI1x1x Rev B0 devices to
> > prevent lockup during some stress tests using frames that include VLAN
> tags.
> > Rev C0 and later hardware already defaults to 3.
> >
> > Fixes: bb4f6bffe33c ("net: lan743x: Add PCI11010 / PCI11414 device
> > IDs")
> > Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@...rochip.com>
> > ---
> >  drivers/net/ethernet/microchip/lan743x_main.c | 17 +++++++++++++++++
> > drivers/net/ethernet/microchip/lan743x_main.h |  5 +++++
> >  2 files changed, 22 insertions(+)
> >
> > diff --git a/drivers/net/ethernet/microchip/lan743x_main.c
> > b/drivers/net/ethernet/microchip/lan743x_main.c
> > index 45e209a7d083..aec2d100ab87 100644
> > --- a/drivers/net/ethernet/microchip/lan743x_main.c
> > +++ b/drivers/net/ethernet/microchip/lan743x_main.c
> > @@ -3272,6 +3272,22 @@ static void lan743x_full_cleanup(struct
> lan743x_adapter *adapter)
> >       lan743x_pci_cleanup(adapter);
> >  }
> >
> > +static int pci11x1x_set_rfe_rd_fifo_threshold(struct lan743x_adapter
> > +*adapter) {
> > +     u16 rev = adapter->csr.id_rev & ID_REV_CHIP_REV_MASK_;
> > +
> > +     if (rev == ID_REV_CHIP_REV_PCI11X1X_B0_) {
> > +             int misc_ctl;
> > +
> > +             misc_ctl = lan743x_csr_read(adapter, MISC_CTL_0);
> > +             misc_ctl &= ~MISC_CTL_0_RFE_READ_FIFO_MASK_;
> > +             misc_ctl |= (0x3 << MISC_CTL_0_RFE_READ_FIFO_SHIFT_);
> > +             lan743x_csr_write(adapter, MISC_CTL_0, misc_ctl);
> 
> Hi Raju,
> 
> Some minor nits from my side:
> 
> - misc_ctl could be an unsigned integer

Ok.

> - The above could probably use FIELD_PREP, which in turn
>   probably means that MISC_CTL_0_RFE_READ_FIFO_SHIFT_ isn't needed

Ok. I will change

> - 0x3 could be a #define - what does it mean?
0x3 is empirical value of "Receive Filtering Engine read fifo threshold" hardware value for PCI11X1X Rev B0 chips
I will add the same comment there.

> 
> > +     }
> > +
> > +     return 0;
> > +}
> > +
> >  static int lan743x_hardware_init(struct lan743x_adapter *adapter,
> >                                struct pci_dev *pdev)  {
> 
> ...

Thanks,
Raju