lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <cd42aca9-ac6c-4579-96d5-121a38ebded5@molgen.mpg.de>
Date: Tue, 19 Mar 2024 23:48:17 +0100
From: Paul Menzel <pmenzel@...gen.mpg.de>
To: Lakshmi Sowjanya D <lakshmi.sowjanya.d@...el.com>
Cc: tglx@...utronix.de, jstultz@...gle.com, giometti@...eenne.com,
 corbet@....net, linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org,
 mallikarjunappa.sangannavar@...el.com, alexandre.torgue@...s.st.com,
 perex@...ex.cz, basavaraj.goudar@...el.com, thejesh.reddy.t.r@...el.com,
 christopher.s.hall@...el.com, x86@...nel.org, joabreu@...opsys.com,
 peter.hilber@...nsynergy.com, intel-wired-lan@...ts.osuosl.org,
 subramanian.mohan@...el.com, linux-sound@...r.kernel.org,
 andriy.shevchenko@...ux.intel.com, netdev@...r.kernel.org,
 pandith.n@...el.com, eddie.dong@...el.com, mcoquelin.stm32@...il.com,
 anthony.l.nguyen@...el.com, davem@...emloft.net
Subject: Re: [Intel-wired-lan] [PATCH v5 00/11] Add support for Intel PPS
 Generator

Dear Lakshmi,


Thank you for your patch series.

Am 19.03.24 um 14:05 schrieb lakshmi.sowjanya.d@...el.com:
> From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@...el.com>
> 
> The goal of the PPS(Pulse Per Second) hardware/software is to generate a

Please add a space before (.

> signal from the system on a wire so that some third-party hardware can
> observe that signal and judge how close the system's time is to another
> system or piece of hardware.
> 
> Existing methods (like parallel ports) require software to flip a bit at
> just the right time to create a PPS signal. Many things can prevent
> software from doing this precisely. This (Timed I/O) method is better
> because software only "arms" the hardware in advance and then depends on
> the hardware to "fire" and flip the signal at just the right time.
> 
> To generate a PPS signal with this new hardware, the kernel wakes up
> twice a second, once for 1->0 edge and other for the 0->1 edge. It does
> this shortly (~10ms) before the actual change in the signal needs to be
> made. It computes the TSC value at which edge will happen, convert to a
> value hardware understands and program this value to Timed I/O hardware.
> The actual edge transition happens without any further action from the
> kernel.
> 
> The result here is a signal coming out of the system that is roughly
> 1,000 times more accurate than the old methods. If the system is heavily
> loaded, the difference in accuracy is larger in old methods.
> 
> Application Interface:
> The API to use Timed I/O is very simple. It is enabled and disabled by
> writing a '1' or '0' value to the sysfs enable attribute associated with
> the Timed I/O PPS device. Each Timed I/O pin is represented by a PPS
> device. When enabled, a pulse-per-second(PPS) synchronized with the

Please add a space before (.

> system clock is continuously produced on the Timed I/O pin, otherwise it
> is pulled low.
> 
> The Timed I/O signal on the motherboard is enabled in the BIOS setup.

It’d be great if you documented your test setup including the name of 
the system firmware option.


Kind regards,

Paul

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ